blob: 923ba9d85c4c95fb54628249e37b355f4da04c5a [file] [log] [blame]
Martin Roth9231f0b2022-10-28 22:39:23 -06001## SPDX-License-Identifier: GPL-2.0-only
Lee Leahy77ff0b12015-05-05 15:07:29 -07002ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
3
Lee Leahy77ff0b12015-05-05 15:07:29 -07004subdirs-y += romstage
Lee Leahy77ff0b12015-05-05 15:07:29 -07005subdirs-y += ../../../cpu/intel/microcode
6subdirs-y += ../../../cpu/intel/turbo
Matt DeVillierd3d0f072018-11-10 17:44:36 -06007subdirs-y += ../../../cpu/intel/common
Lee Leahy77ff0b12015-05-05 15:07:29 -07008
Frans Hendriks4e0ec592019-06-06 10:07:17 +02009bootblock-y += gpio_support.c
10bootblock-y += bootblock/bootblock.c
11bootblock-y += lpc_init.c
12bootblock-y += pmutil.c
13bootblock-y += tsc_freq.c
14
Lee Leahy32471722015-04-20 15:20:28 -070015romstage-y += gpio_support.c
Lee Leahy77ff0b12015-05-05 15:07:29 -070016romstage-y += iosf.c
Lee Leahy32471722015-04-20 15:20:28 -070017romstage-y += memmap.c
Aaron Durbinb19e33f2017-09-15 14:32:13 -060018romstage-y += pmutil.c
Michał Żygowski11194282019-03-27 10:39:55 +010019romstage-y += smbus.c
Lee Leahy32471722015-04-20 15:20:28 -070020romstage-y += tsc_freq.c
21
Arthur Heymansbe291e82019-01-06 07:35:11 +010022postcar-y += memmap.c
23postcar-y += iosf.c
Philipp Deppenwiese66f9a092018-11-08 10:59:40 +010024postcar-y += tsc_freq.c
25
Lee Leahy77ff0b12015-05-05 15:07:29 -070026ramstage-y += acpi.c
Lee Leahy32471722015-04-20 15:20:28 -070027ramstage-y += chip.c
28ramstage-y += cpu.c
Lee Leahy77ff0b12015-05-05 15:07:29 -070029ramstage-$(CONFIG_ELOG) += elog.c
Lee Leahy32471722015-04-20 15:20:28 -070030ramstage-y += emmc.c
Angel Pons6ee77512020-07-12 15:47:07 +020031ramstage-y += fadt.c
Lee Leahy32471722015-04-20 15:20:28 -070032ramstage-y += gpio.c
Lee Leahy32471722015-04-20 15:20:28 -070033ramstage-y += gfx.c
Frans Hendriks863853c2019-06-18 12:18:55 +020034ramstage-y += smbus.c
Matt DeVilliera9492a62018-06-20 00:40:48 -050035
Subrata Baniked7275f2015-08-22 10:36:41 +053036ramstage-y += gpio_support.c
Lee Leahy32471722015-04-20 15:20:28 -070037ramstage-y += iosf.c
38ramstage-y += lpe.c
39ramstage-y += lpss.c
40ramstage-y += memmap.c
41ramstage-y += northcluster.c
42ramstage-y += pcie.c
43ramstage-y += pmutil.c
44ramstage-y += ramstage.c
45ramstage-y += sata.c
46ramstage-y += scc.c
47ramstage-y += sd.c
48ramstage-y += smm.c
49ramstage-y += southcluster.c
Lee Leahy32471722015-04-20 15:20:28 -070050ramstage-y += tsc_freq.c
shkimcc728f02015-09-22 17:53:58 +090051ramstage-y += xhci.c
Lee Leahy77ff0b12015-05-05 15:07:29 -070052
53# Remove as ramstage gets fleshed out
54ramstage-y += placeholders.c
Lee Leahyacb9c0b2015-07-02 11:55:18 -070055smm-y += lpc_init.c
Lee Leahy32471722015-04-20 15:20:28 -070056smm-y += pmutil.c
57smm-y += smihandler.c
Lee Leahy32471722015-04-20 15:20:28 -070058smm-y += tsc_freq.c
59
Frans Hendriks9c906092019-05-10 15:00:46 +020060verstage-y += pmutil.c
61verstage-y += tsc_freq.c
62
Lee Leahy32471722015-04-20 15:20:28 -070063CPPFLAGS_common += -I$(src)/soc/intel/braswell/
64CPPFLAGS_common += -I$(src)/soc/intel/braswell/include
Matt DeVillierfd7440d2019-04-23 12:21:17 -050065CPPFLAGS_common += -I$(call strip_quotes,$(CONFIG_FSP_HEADER_PATH))
Lee Leahy32471722015-04-20 15:20:28 -070066
Michał Żygowski6e61c5e2020-03-04 18:32:37 +010067cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-4c-*)
68
Martin Rothf812c442016-01-04 12:43:22 -070069ifneq ($(CONFIG_VGA_BIOS_FILE),)
70#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin
71BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)))
72
73cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom
74pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS)
75pci8086,22b1.rom-type := optionrom
Martin Rothf812c442016-01-04 12:43:22 -070076endif # ifneq ($(CONFIG_VGA_BIOS_FILE),)
77
78endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)