Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 4 | ## |
| 5 | ## This program is free software; you can redistribute it and/or |
| 6 | ## modify it under the terms of the GNU General Public License as |
| 7 | ## published by the Free Software Foundation; version 2 of |
| 8 | ## the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | |
| 16 | chip northbridge/intel/sandybridge |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 17 | register "gfx.use_spread_spectrum_clock" = "0" |
| 18 | register "gpu_dp_b_hotplug" = "0" |
| 19 | register "gpu_dp_c_hotplug" = "0" |
| 20 | register "gpu_dp_d_hotplug" = "0" |
| 21 | |
| 22 | device cpu_cluster 0x0 on |
| 23 | chip cpu/intel/model_206ax |
| 24 | register "c1_acpower" = "1" |
| 25 | register "c1_battery" = "1" |
| 26 | register "c2_acpower" = "3" |
| 27 | register "c2_battery" = "3" |
| 28 | register "c3_acpower" = "5" |
| 29 | register "c3_battery" = "5" |
| 30 | device lapic 0x0 on end |
| 31 | device lapic 0xacac off end |
| 32 | end |
| 33 | end |
| 34 | |
| 35 | register "pci_mmio_size" = "2048" |
| 36 | |
| 37 | device domain 0x0 on |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 38 | subsystemid 0x103c 0x1791 inherit |
Angel Pons | 942650f | 2020-01-01 20:56:08 +0100 | [diff] [blame] | 39 | |
| 40 | device pci 00.0 on end # Host bridge Host bridge |
| 41 | device pci 01.0 on end # PCIe Bridge for discrete graphics |
| 42 | device pci 02.0 on end # Internal graphics VGA controller |
| 43 | |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 44 | chip southbridge/intel/bd82x6x # Intel Series 7 PCH |
| 45 | register "c2_latency" = "0x0065" |
| 46 | register "docking_supported" = "0" |
| 47 | register "gen1_dec" = "0x00fc0601" |
| 48 | register "gen2_dec" = "0x00fc0801" |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 49 | register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" |
| 50 | register "pcie_port_coalesce" = "1" |
| 51 | register "sata_interface_speed_support" = "0x3" |
| 52 | register "sata_port_map" = "0xf" |
| 53 | register "spi_lvscc" = "0x2005" |
| 54 | register "spi_uvscc" = "0x2005" |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 55 | |
| 56 | device pci 14.0 on end # xHCI |
| 57 | device pci 16.0 on end # Management Engine Interface 1 |
| 58 | device pci 16.1 off end # Management Engine Interface 2 |
| 59 | device pci 16.2 off end # Management Engine IDE-R |
| 60 | device pci 16.3 on end # Management Engine KT |
| 61 | device pci 19.0 on end # Intel Gigabit Ethernet |
| 62 | device pci 1a.0 on end # USB2 EHCI #2 |
| 63 | device pci 1b.0 on end # High Definition Audio Audio controller |
| 64 | device pci 1c.0 on end # PCIe Port #1 |
| 65 | device pci 1c.1 off end # PCIe Port #2 |
| 66 | device pci 1c.2 off end # PCIe Port #3 |
| 67 | device pci 1c.3 off end # PCIe Port #4 |
| 68 | device pci 1c.4 on end # PCIe Port #5 |
| 69 | device pci 1c.5 off end # PCIe Port #6 |
| 70 | device pci 1c.6 on end # PCIe Port #7 |
| 71 | device pci 1c.7 on end # PCIe Port #8 |
| 72 | device pci 1d.0 on end # USB2 EHCI #1 |
| 73 | device pci 1e.0 on end # PCI bridge |
| 74 | device pci 1f.0 on # LPC bridge PCI-LPC bridge |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 75 | chip superio/common |
| 76 | device pnp 2e.ff on # passes SIO base addr to SSDT gen |
| 77 | chip superio/nuvoton/npcd378 |
| 78 | device pnp 2e.0 off end # Floppy |
| 79 | device pnp 2e.1 on # Parallel port |
| 80 | # global |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 81 | |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 82 | # serialice: Vendor writes: |
| 83 | irq 0x14 = 0x9c |
| 84 | irq 0x1c = 0xa8 |
| 85 | irq 0x1d = 0x08 |
| 86 | irq 0x22 = 0x3f |
| 87 | irq 0x1a = 0xb0 |
| 88 | # dumped from superiotool: |
| 89 | irq 0x1b = 0x1e |
| 90 | irq 0x27 = 0x08 |
| 91 | irq 0x2a = 0x20 |
| 92 | irq 0x2d = 0x01 |
| 93 | # parallel port |
| 94 | io 0x60 = 0x378 |
| 95 | irq 0x70 = 0x07 |
| 96 | drq 0x74 = 0x01 |
| 97 | end |
| 98 | device pnp 2e.2 off # COM1 |
| 99 | io 0x60 = 0x2f8 |
| 100 | irq 0x70 = 3 |
| 101 | end |
| 102 | device pnp 2e.3 on # COM2, IR |
| 103 | io 0x60 = 0x3f8 |
| 104 | irq 0x70 = 4 |
| 105 | end |
| 106 | device pnp 2e.4 on # LED control |
| 107 | io 0x60 = 0x600 |
| 108 | # IOBASE[0h] = bit0 LED red / green |
| 109 | # IOBASE[0h] = bit1-4 LED PWM duty cycle |
| 110 | # IOBASE[1h] = bit6 SWCC |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 111 | |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 112 | io 0x62 = 0x610 |
| 113 | # IOBASE [0h] = GPES |
| 114 | # IOBASE [1h] = GPEE |
| 115 | # IOBASE [4h:7h] = 32bit upcounter at 1Mhz |
| 116 | # IOBASE [8h:bh] = GPS |
| 117 | # IOBASE [ch:fh] = GPE |
| 118 | end |
| 119 | device pnp 2e.5 on # Mouse |
| 120 | irq 0x70 = 0xc |
| 121 | end |
| 122 | device pnp 2e.6 on # Keyboard |
| 123 | io 0x60 = 0x0060 |
| 124 | io 0x62 = 0x0064 |
| 125 | irq 0x70 = 0x01 |
| 126 | # serialice: Vendor writes: |
| 127 | drq 0xf0 = 0x40 |
| 128 | end |
| 129 | device pnp 2e.7 on # WDT ? |
| 130 | io 0x60 = 0x620 |
| 131 | end |
| 132 | device pnp 2e.8 on # HWM |
| 133 | io 0x60 = 0x800 |
| 134 | # IOBASE[0h:feh] HWM page |
| 135 | # IOBASE[ffh] bit0-bit3 page selector |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 136 | |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 137 | drq 0xf0 = 0x20 |
| 138 | drq 0xf1 = 0x01 |
| 139 | drq 0xf2 = 0x40 |
| 140 | drq 0xf3 = 0x01 |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 141 | |
Patrick Rudolph | e1498ce | 2020-02-12 15:23:05 +0100 | [diff] [blame] | 142 | drq 0xf4 = 0x66 |
| 143 | drq 0xf5 = 0x67 |
| 144 | drq 0xf6 = 0x66 |
| 145 | drq 0xf7 = 0x01 |
| 146 | end |
| 147 | device pnp 2e.f on # GPIO OD ? |
| 148 | drq 0xf1 = 0x97 |
| 149 | drq 0xf2 = 0x01 |
| 150 | drq 0xf5 = 0x08 |
| 151 | drq 0xfe = 0x80 |
| 152 | end |
| 153 | device pnp 2e.15 on # BUS ? |
| 154 | io 0x60 = 0x0680 |
| 155 | io 0x62 = 0x0690 |
| 156 | end |
| 157 | device pnp 2e.1c on # Suspend Control ? |
| 158 | io 0x60 = 0x640 |
| 159 | # writing to IOBASE[5h] |
| 160 | # 0x0: Power off |
| 161 | # 0x9: Power off and bricked until CMOS battery removed |
| 162 | end |
| 163 | device pnp 2e.1e on # GPIO ? |
| 164 | io 0x60 = 0x660 |
| 165 | drq 0xf4 = 0x01 |
| 166 | # skip the following, as it |
| 167 | # looks like remapped registers |
| 168 | #drq 0xf5 = 0x06 |
| 169 | #drq 0xf6 = 0x60 |
| 170 | #drq 0xfe = 0x03 |
| 171 | end |
| 172 | end |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 173 | end |
| 174 | end |
| 175 | chip drivers/pc80/tpm |
| 176 | device pnp 4e.0 on end # TPM module |
| 177 | end |
| 178 | end |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 179 | device pci 1f.2 on end # SATA Controller 1 |
| 180 | device pci 1f.3 on end # SMBus |
| 181 | device pci 1f.5 off end # SATA Controller 2 |
| 182 | device pci 1f.6 off end # Thermal |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 183 | end |
Patrick Rudolph | 05284b6 | 2019-06-04 15:56:44 +0200 | [diff] [blame] | 184 | end |
| 185 | end |