blob: 2ba11b436cad4a709b91fd5a856b3bb4832db1e8 [file] [log] [blame]
Michał Żygowski72f06ca2020-04-13 21:42:24 +02001chip northbridge/intel/sandybridge
Keith Hui45e4ab42023-07-22 12:49:05 -04002 register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
Arthur Heymanscdb26fd2021-11-15 20:12:02 +01003 chip cpu/intel/model_206ax
4 device cpu_cluster 0 on end
5
6 register "tcc_offset" = "5" # TCC of 95C
Michał Żygowski72f06ca2020-04-13 21:42:24 +02007 end
Angel Ponsbceea672021-05-17 10:58:36 +02008 device domain 0 on
Michał Żygowski72f06ca2020-04-13 21:42:24 +02009
Felix Singerd759f962024-01-18 06:53:02 +010010 device ref host_bridge on end
11 device ref peg10 on # blue slot1
Michał Żygowski7e8b5972022-02-20 23:27:18 +010012 smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "SLOT1" "SlotDataBusWidth16X"
Michał Żygowski72f06ca2020-04-13 21:42:24 +020013 end
Felix Singerd759f962024-01-18 06:53:02 +010014 device ref igd on end
15 device ref peg60 off end
Michał Żygowski72f06ca2020-04-13 21:42:24 +020016
17 chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
Michał Żygowski8ebea122021-11-21 17:43:55 +010018 register "gpe0_en" = "0x00002a46"
Michał Żygowski72f06ca2020-04-13 21:42:24 +020019 register "alt_gp_smi_en" = "0x0004"
20 register "gpi2_routing" = "1"
21 register "gpi12_routing" = "2"
Michał Żygowski72f06ca2020-04-13 21:42:24 +020022 register "gen1_dec" = "0x007c0a01"
23 register "gen2_dec" = "0x007c0901"
24 register "gen3_dec" = "0x003c07e1"
25 register "gen4_dec" = "0x001c0901"
Angel Ponsaf4bd562021-12-28 13:05:56 +010026 register "pcie_port_coalesce" = "true"
Michał Żygowski72f06ca2020-04-13 21:42:24 +020027 register "sata_interface_speed_support" = "0x3"
Michał Żygowski72f06ca2020-04-13 21:42:24 +020028 register "spi_lvscc" = "0x2005"
29 register "spi_uvscc" = "0x2005"
30 register "superspeed_capable_ports" = "0x0000000f"
31 register "xhci_overcurrent_mapping" = "0x08040201"
32 register "xhci_switchable_ports" = "0x0000000f"
Keith Huic36b5ea12024-02-05 16:11:26 -050033 register "usb_port_config" = "{
34 { 1, 6, 0 },
35 { 1, 6, 0 },
36 { 1, 1, 1 },
37 { 1, 1, 1 },
38 { 1, 1, 2 },
39 { 1, 1, 2 },
40 { 1, 6, 3 },
41 { 1, 6, 3 },
42 { 1, 6, 4 },
43 { 1, 6, 4 },
44 { 1, 6, 5 },
45 { 1, 1, 5 },
46 { 1, 1, 6 },
47 { 1, 6, 6 }
48 }"
Felix Singerd759f962024-01-18 06:53:02 +010049 device ref xhci on end
50 device ref mei1 off end
51 device ref mei2 off end
52 device ref me_ide_r off end
53 device ref me_kt off end
54 device ref gbe on end
55 device ref ehci2 on end
56 device ref hda on end
57 device ref pcie_rp1 off end
58 device ref pcie_rp2 off end
59 device ref pcie_rp3 off end
60 device ref pcie_rp4 off end
61 device ref pcie_rp5 off end
62 device ref pcie_rp6 off end
63 device ref pcie_rp7 off end
64 device ref pcie_rp8 off end
65 device ref ehci1 on end
66 device ref pci_bridge off end
67 device ref lpc on
Michał Żygowski72f06ca2020-04-13 21:42:24 +020068 chip drivers/pc80/tpm
69 device pnp 0c31.0 on end
70 end
71 chip superio/smsc/sch5545
72 device pnp 2e.c on # LPC
73 io 0x60 = 0x2e
74 end
75 device pnp 2e.0 on # EMI
76 io 0x60 = 0xa40
77 end
78 device pnp 2e.1 on # KBC/PS2M
79 io 0x60 = 0x60
80 irq 0x70 = 1
81 irq 0x72 = 12
82 end
83 device pnp 2e.7 on # UART1
84 io 0x60 = 0x3f8
85 irq 0x70 = 4
86 irq 0xf0 = 0x02
87 end
88 device pnp 2e.8 off end # UART2
89 device pnp 2e.a on # Runtime registers
90 io 0x60 = 0xa00
91 irq 0x70 = 9 # PME
92 end
93 device pnp 2e.b off end # Floppy
94 device pnp 2e.11 off end # PP
95 end
96 end
Felix Singerd759f962024-01-18 06:53:02 +010097 device ref sata1 on end
98 device ref smbus on end
99 device ref sata2 off end
100 device ref thermal on end
Michał Żygowski72f06ca2020-04-13 21:42:24 +0200101 end
102 end
103end