Timothy Pearson | 53538be | 2015-04-30 01:47:31 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Timothy Pearson | 53538be | 2015-04-30 01:47:31 -0500 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <console/console.h> |
| 18 | #include <string.h> |
| 19 | #include <arch/acpi.h> |
| 20 | #include <arch/ioapic.h> |
| 21 | #include <device/pci.h> |
| 22 | #include <device/pci_ids.h> |
| 23 | #include <cpu/x86/msr.h> |
| 24 | #include <cpu/amd/mtrr.h> |
| 25 | #include <cpu/amd/amdfam10_sysconf.h> |
| 26 | |
| 27 | #include "mb_sysconf.h" |
| 28 | |
| 29 | unsigned long acpi_fill_madt(unsigned long current) |
| 30 | { |
| 31 | device_t dev; |
| 32 | u32 dword; |
| 33 | u32 gsi_base=0; |
| 34 | uint32_t apicid_sp5100; |
| 35 | uint32_t apicid_sr5650; |
| 36 | /* create all subtables for processors */ |
| 37 | current = acpi_create_madt_lapics(current); |
| 38 | |
Timothy Pearson | c2ed40b | 2015-11-24 14:12:01 -0600 | [diff] [blame^] | 39 | if (IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0)) |
| 40 | apicid_sp5100 = 0x0; |
| 41 | else |
| 42 | apicid_sp5100 = 0x20; |
Timothy Pearson | 53538be | 2015-04-30 01:47:31 -0500 | [diff] [blame] | 43 | apicid_sr5650 = apicid_sp5100 + 1; |
| 44 | |
| 45 | /* Write SB700 IOAPIC, only one */ |
| 46 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, apicid_sp5100, |
| 47 | IO_APIC_ADDR, gsi_base); |
| 48 | /* IOAPIC on rs5690 */ |
| 49 | gsi_base += 24; /* SB700 has 24 IOAPIC entries. */ |
| 50 | dev = dev_find_slot(0, PCI_DEVFN(0, 0)); |
| 51 | if (dev) { |
| 52 | pci_write_config32(dev, 0xF8, 0x1); |
| 53 | dword = pci_read_config32(dev, 0xFC) & 0xfffffff0; |
| 54 | current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, apicid_sr5650, |
| 55 | dword, gsi_base); |
| 56 | } |
| 57 | |
| 58 | /* bus, source, gsirq, flags */ |
| 59 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
| 60 | current, 0, 0, 2, 0); |
| 61 | current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) |
Timothy Pearson | c2ed40b | 2015-11-24 14:12:01 -0600 | [diff] [blame^] | 62 | current, 0, 9, 9, 0xf); |
Timothy Pearson | 53538be | 2015-04-30 01:47:31 -0500 | [diff] [blame] | 63 | |
| 64 | /* create all subtables for processors */ |
Timothy Pearson | c2ed40b | 2015-11-24 14:12:01 -0600 | [diff] [blame^] | 65 | current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 0, 1); |
Timothy Pearson | 53538be | 2015-04-30 01:47:31 -0500 | [diff] [blame] | 66 | /* 1: LINT1 connect to NMI */ |
| 67 | |
| 68 | return current; |
| 69 | } |
Timothy Pearson | 44e4a4e | 2015-08-11 17:49:06 -0500 | [diff] [blame] | 70 | |
| 71 | unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current) |
| 72 | { |
| 73 | uint8_t *p; |
| 74 | |
| 75 | uint32_t apicid_sp5100; |
| 76 | uint32_t apicid_sr5650; |
| 77 | |
Timothy Pearson | c2ed40b | 2015-11-24 14:12:01 -0600 | [diff] [blame^] | 78 | if (IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0)) |
| 79 | apicid_sp5100 = 0x0; |
| 80 | else |
| 81 | apicid_sp5100 = 0x20; |
Timothy Pearson | 44e4a4e | 2015-08-11 17:49:06 -0500 | [diff] [blame] | 82 | apicid_sr5650 = apicid_sp5100 + 1; |
| 83 | |
| 84 | /* Describe NB IOAPIC */ |
| 85 | p = (uint8_t *)current; |
| 86 | p[0] = 0x48; /* Entry type */ |
| 87 | p[1] = 0; /* Device */ |
| 88 | p[2] = 0; /* Bus */ |
| 89 | p[3] = 0x0; /* Data */ |
| 90 | p[4] = apicid_sr5650; /* IOAPIC ID */ |
| 91 | p[5] = 0x1; /* Device 0 Function 1 */ |
| 92 | p[6] = 0x0; /* Northbridge bus */ |
| 93 | p[7] = 0x1; /* Variety */ |
| 94 | current += 8; |
| 95 | |
| 96 | /* Describe SB IOAPIC */ |
| 97 | p = (uint8_t *)current; |
| 98 | p[0] = 0x48; /* Entry type */ |
| 99 | p[1] = 0; /* Device */ |
| 100 | p[2] = 0; /* Bus */ |
| 101 | p[3] = 0xd7; /* Data */ |
| 102 | p[4] = apicid_sp5100; /* IOAPIC ID */ |
| 103 | p[5] = 0x14 << 3; /* Device 0x14 Function 0 */ |
| 104 | p[6] = 0x0; /* Southbridge bus */ |
| 105 | p[7] = 0x1; /* Variety */ |
| 106 | current += 8; |
| 107 | |
| 108 | return current; |
| 109 | } |