| Angel Pons | 47f26db | 2020-04-05 13:22:34 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Matt DeVillier | 9be3f5d | 2017-01-16 17:32:38 -0600 | [diff] [blame] | 2 | |
| 3 | #ifndef VARIANT_H |
| 4 | #define VARIANT_H |
| 5 | |
| Elyes HAOUAS | dfbe6bd | 2018-10-29 06:56:52 +0100 | [diff] [blame] | 6 | #include <stdint.h> |
| 7 | |
| Matt DeVillier | 9be3f5d | 2017-01-16 17:32:38 -0600 | [diff] [blame] | 8 | /* |
| 9 | * RAM_ID[3:0] are on GPIO_SSUS[40:37] |
| 10 | * RAM_ID Vendor Vendor_PN Freq Size Total_size channel |
| 11 | * 0b0011 Hynix H5TC4G63AFR-PBA 1600MHZ 4Gb 2GB single-channel |
| 12 | * 0b0100 Hynix H5TC4G63CFR-PBA 1600MHZ 4Gb 2GB single-channel |
| 13 | * 0b0101 Samsung K4B4G1646Q-HYK0 1600MHZ 4Gb 2GB single-channel |
| 14 | * 0b0110 Hynix H5TC4G63CFR-PBA 1600MHZ 4Gb 4GB dual-channel |
| 15 | * 0b0111 Samsung K4B4G1646Q-HYK0 1600MHZ 4Gb 4GB dual-channel |
| 16 | */ |
| 17 | |
| 18 | static const uint32_t dual_channel_config = |
| 19 | (1 << 6) | (1 << 7); |
| 20 | |
| 21 | #define SPD_SIZE 256 |
| 22 | #define GPIO_SSUS_37_PAD 57 |
| 23 | #define GPIO_SSUS_38_PAD 50 |
| 24 | #define GPIO_SSUS_39_PAD 58 |
| 25 | #define GPIO_SSUS_40_PAD 52 |
| 26 | |
| 27 | #endif |