blob: 50e9ad872543423ff451f1588d655859b5c75f67 [file] [log] [blame]
Angel Pons47f26db2020-04-05 13:22:34 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Matt DeVillier9be3f5d2017-01-16 17:32:38 -06002
3#ifndef VARIANT_H
4#define VARIANT_H
5
Elyes HAOUASdfbe6bd2018-10-29 06:56:52 +01006#include <stdint.h>
7
Matt DeVillier9be3f5d2017-01-16 17:32:38 -06008/*
9 * RAM_ID[2:0] are on GPIO_SSUS[39:37]
10 * 0b000 - 4GiB total - 2 x 2GiB Samsung K4B4G1646Q-HYK0 1600MHz
11 * 0b001 - 4GiB total - 2 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz
12 * 0b010 - 2GiB total - 2 x 1GiB Micron MT41K128M16JT-125:K 1600MHz
13 * 0b011 - 2GiB total - 1 x 2GiB Hynix H5TC4G63MFR-PBA 1600MHz
14 * 0b100 - 2GiB total - 1 x 2GiB Hynix H5TC4G63CFR-PBA 1600MHz
15 * 0b101 - 2GiB total - 1 x 2GiB Hynix H5TC4G63AFR-PBA 1600MHz
16 * 0b110 - 4GiB total - 2 x 2GiB Hynix H5TC4G63CFR-PBA 1600MHz
17 * 0b111 - 4GiB total - 2 x 2GiB Hynix H5TC4G63MFR-PBA 1600MHz
18*/
19
20static const uint32_t dual_channel_config =
21 (1 << 0) | (1 << 1) | (1 << 2) | (1 << 6) | (1 << 7);
22
23#define SPD_SIZE 256
24#define GPIO_SSUS_37_PAD 57
25#define GPIO_SSUS_38_PAD 50
26#define GPIO_SSUS_39_PAD 58
Matt DeVillier474a7c52017-02-07 22:07:56 -060027#define GPIO_SSUS_40_PAD 52
28#define GPIO_SSUS_40_PAD_USE_PULLDOWN
Matt DeVillier9be3f5d2017-01-16 17:32:38 -060029
30#endif