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Daisuke Nojiri3a2ac882015-02-09 19:39:39 -08001/*
Daisuke Nojiric047b102015-01-23 10:02:24 -08002 * This file is part of the coreboot project.
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -08003 *
Daisuke Nojiric047b102015-01-23 10:02:24 -08004 * Copyright (C) 2000 Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
5 * Copyright (C) Broadcom Corporation
6 * Copyright (C) 2015 Google Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080021 */
22
Daisuke Nojiric047b102015-01-23 10:02:24 -080023#include <arch/io.h>
24#include <boot/coreboot_tables.h>
25#include <console/console.h> /* for __console definition */
26#include <console/uart.h>
27#include <delay.h>
28#include <soc/ns16550.h>
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080029
Daisuke Nojiric047b102015-01-23 10:02:24 -080030#define SYS_NS16550_CLK 100000000
31#define SYS_NS16550_BAUDRATE 115200
32#define MODE_X_DIV 16
33#define SINGLE_CHAR_TIMEOUT (50 * 1000)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080034
Daisuke Nojiric047b102015-01-23 10:02:24 -080035static struct ns16550 * const regs =
36 (void *)CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080037
Daisuke Nojiric047b102015-01-23 10:02:24 -080038static int calc_divisor(void)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080039{
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080040 /* Compute divisor value. Normally, we should simply return:
Daisuke Nojiric047b102015-01-23 10:02:24 -080041 * ns16550_clk / MODE_X_DIV / baudrate
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080042 * but we need to round that value by adding 0.5.
43 * Rounding is especially important at high baud rates.
44 */
Daisuke Nojiric047b102015-01-23 10:02:24 -080045 int div = MODE_X_DIV * SYS_NS16550_BAUDRATE;
46 return (SYS_NS16550_CLK + div / 2) / div;
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080047}
48
Daisuke Nojiric047b102015-01-23 10:02:24 -080049static void ns16550_init(void)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080050{
Daisuke Nojiric047b102015-01-23 10:02:24 -080051 int baud_divisor = calc_divisor();
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080052
Daisuke Nojiric047b102015-01-23 10:02:24 -080053 while (!(readl(&regs->lsr) & UART_LSR_TEMT))
54 ;
55
56 writel(0, &regs->ier);
57 writel(UART_LCR_BKSE | UART_LCR_8N1, &regs->lcr);
58 writel(0, &regs->dll);
59 writel(0, &regs->dlm);
60 writel(UART_LCR_8N1, &regs->lcr);
61 writel(UART_MCR_DTR | UART_MCR_RTS, &regs->mcr);
62 /* clear & enable FIFOs */
63 writel(UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR, &regs->fcr);
64 writel(UART_LCR_BKSE | UART_LCR_8N1, &regs->lcr);
65 writel(baud_divisor & 0xff, &regs->dll);
66 writel((baud_divisor >> 8) & 0xff, &regs->dlm);
67 writel(UART_LCR_8N1, &regs->lcr);
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080068}
69
Daisuke Nojiric047b102015-01-23 10:02:24 -080070static void ns16550_tx_byte(unsigned char data)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080071{
Daisuke Nojiric047b102015-01-23 10:02:24 -080072 while ((readl(&regs->lsr) & UART_LSR_THRE) == 0)
73 ;
74 writel(data, &regs->thr);
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080075}
76
Daisuke Nojiric047b102015-01-23 10:02:24 -080077static void ns16550_tx_flush(void)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080078{
Daisuke Nojiric047b102015-01-23 10:02:24 -080079 while (!(readl(&regs->lsr) & UART_LSR_TEMT))
80 ;
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080081}
82
Daisuke Nojiric047b102015-01-23 10:02:24 -080083static int ns16550_tst_byte(void)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080084{
Daisuke Nojiric047b102015-01-23 10:02:24 -080085 return (readl(&regs->lsr) & UART_LSR_DR) != 0;
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080086}
87
Daisuke Nojiric047b102015-01-23 10:02:24 -080088static unsigned char ns16550_rx_byte(void)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080089{
Daisuke Nojiric047b102015-01-23 10:02:24 -080090 unsigned long int i = SINGLE_CHAR_TIMEOUT;
91 while (i-- && !ns16550_tst_byte())
92 udelay(1);
93 if (i)
94 return readl(&regs->rbr);
95 else
96 return 0x0;
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -080097}
98
Daisuke Nojiric047b102015-01-23 10:02:24 -080099void uart_init(int idx)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800100{
Daisuke Nojiric047b102015-01-23 10:02:24 -0800101 ns16550_init();
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800102}
103
Daisuke Nojiric047b102015-01-23 10:02:24 -0800104void uart_tx_byte(int idx, unsigned char data)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800105{
Daisuke Nojiric047b102015-01-23 10:02:24 -0800106 ns16550_tx_byte(data);
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800107}
108
Daisuke Nojiric047b102015-01-23 10:02:24 -0800109void uart_tx_flush(int idx)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800110{
Daisuke Nojiric047b102015-01-23 10:02:24 -0800111 ns16550_tx_flush();
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800112}
113
Daisuke Nojiric047b102015-01-23 10:02:24 -0800114unsigned char uart_rx_byte(int idx)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800115{
Daisuke Nojiric047b102015-01-23 10:02:24 -0800116 return ns16550_rx_byte();
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800117}
118
Daisuke Nojiric047b102015-01-23 10:02:24 -0800119#ifndef __PRE_RAM__
120void uart_fill_lb(void *data)
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800121{
Daisuke Nojiric047b102015-01-23 10:02:24 -0800122 struct lb_serial serial;
123 serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
124 serial.baseaddr = (uintptr_t)regs;
125 serial.baud = default_baudrate();
126 serial.regwidth = 1;
127 lb_add_serial(&serial, data);
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800128
Daisuke Nojiric047b102015-01-23 10:02:24 -0800129 lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800130}
Daisuke Nojiri3a2ac882015-02-09 19:39:39 -0800131#endif