blob: 84577457245a43c661a34116567ae5ea42ebc032 [file] [log] [blame]
Michael Xie80d7c852008-09-22 13:16:18 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
Joe Bao7c3d3b22008-12-01 19:52:54 +000020/* This file was generated by getpir.c, do not modify!
Michael Xie80d7c852008-09-22 13:16:18 +000021 (but if you do, please run checkpir on it to verify)
22 Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
23
24 Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
25*/
26#include <console/console.h>
27#include <device/pci.h>
28#include <string.h>
29#include <stdint.h>
30#include <arch/pirq_routing.h>
31
32#include <cpu/amd/amdk8_sysconf.h>
33
34extern void get_bus_conf(void);
35
36static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
37 u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
38 u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
39 u8 slot, u8 rfu)
40{
41 pirq_info->bus = bus;
42 pirq_info->devfn = devfn;
43 pirq_info->irq[0].link = link0;
44 pirq_info->irq[0].bitmap = bitmap0;
45 pirq_info->irq[1].link = link1;
46 pirq_info->irq[1].bitmap = bitmap1;
47 pirq_info->irq[2].link = link2;
48 pirq_info->irq[2].bitmap = bitmap2;
49 pirq_info->irq[3].link = link3;
50 pirq_info->irq[3].bitmap = bitmap3;
51 pirq_info->slot = slot;
52 pirq_info->rfu = rfu;
53}
54extern u8 bus_isa;
55extern u8 bus_rs690[8];
56extern u8 bus_sb600[2];
57extern unsigned long sbdn_sb600;
58
59unsigned long write_pirq_routing_table(unsigned long addr)
60{
61 struct irq_routing_table *pirq;
62 struct irq_info *pirq_info;
63 u32 slot_num;
64 u8 *v;
65
66 u8 sum = 0;
67 int i;
68
69 get_bus_conf(); /* it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c */
70
71 /* Align the table to be 16 byte aligned. */
72 addr += 15;
73 addr &= ~15;
74
75 /* This table must be betweeen 0xf0000 & 0x100000 */
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +000076 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
Michael Xie80d7c852008-09-22 13:16:18 +000077
78 pirq = (void *)(addr);
79 v = (u8 *) (addr);
80
81 pirq->signature = PIRQ_SIGNATURE;
82 pirq->version = PIRQ_VERSION;
83
84 pirq->rtr_bus = bus_sb600[0];
85 pirq->rtr_devfn = ((sbdn_sb600 + 0x14) << 3) | 4;
86
87 pirq->exclusive_irqs = 0;
88
89 pirq->rtr_vendor = 0x1002;
90 pirq->rtr_device = 0x4384;
91
92 pirq->miniport_data = 0;
93
94 memset(pirq->rfu, 0, sizeof(pirq->rfu));
95
96 pirq_info = (void *)(&pirq->checksum + 1);
97 slot_num = 0;
98
99 /* pci bridge */
100 write_pirq_info(pirq_info, bus_sb600[0], ((sbdn_sb600 + 0x14) << 3) | 4,
101 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
102 0);
103 pirq_info++;
104 slot_num++;
105
106 pirq->size = 32 + 16 * slot_num;
107
108 for (i = 0; i < pirq->size; i++)
109 sum += v[i];
110
111 sum = pirq->checksum - sum;
112 if (sum != pirq->checksum) {
113 pirq->checksum = sum;
114 }
115
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +0000116 printk(BIOS_INFO, "write_pirq_routing_table done.\n");
Michael Xie80d7c852008-09-22 13:16:18 +0000117
118 return (unsigned long)pirq_info;
119}