Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 1 | #include <cpu/x86/lapic.h> |
| 2 | #include <console/console.h> |
| 3 | #include <cpu/x86/msr.h> |
| 4 | #include <cpu/x86/mtrr.h> |
| 5 | |
| 6 | void setup_lapic(void) |
| 7 | { |
| 8 | /* this is so interrupts work. This is very limited scope -- |
| 9 | * linux will do better later, we hope ... |
| 10 | */ |
| 11 | /* this is the first way we learned to do it. It fails on real SMP |
| 12 | * stuff. So we have to do things differently ... |
| 13 | * see the Intel mp1.4 spec, page A-3 |
| 14 | */ |
| 15 | |
| 16 | #if NEED_LAPIC == 1 |
| 17 | /* Only Pentium Pro and later have those MSR stuff */ |
| 18 | msr_t msr; |
| 19 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame^] | 20 | printk(BIOS_INFO, "Setting up local apic..."); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 21 | |
| 22 | /* Enable the local apic */ |
| 23 | msr = rdmsr(LAPIC_BASE_MSR); |
| 24 | msr.lo |= LAPIC_BASE_MSR_ENABLE; |
| 25 | msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK; |
| 26 | msr.lo |= LAPIC_DEFAULT_BASE; |
| 27 | wrmsr(LAPIC_BASE_MSR, msr); |
| 28 | |
| 29 | /* |
| 30 | * Set Task Priority to 'accept all'. |
| 31 | */ |
| 32 | lapic_write_around(LAPIC_TASKPRI, |
| 33 | lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK); |
| 34 | |
| 35 | /* Put the local apic in virtual wire mode */ |
| 36 | lapic_write_around(LAPIC_SPIV, |
| 37 | (lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK)) |
| 38 | | LAPIC_SPIV_ENABLE); |
| 39 | lapic_write_around(LAPIC_LVT0, |
| 40 | (lapic_read_around(LAPIC_LVT0) & |
| 41 | ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | |
| 42 | LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | |
| 43 | LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 | |
| 44 | LAPIC_DELIVERY_MODE_MASK)) |
| 45 | | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | |
| 46 | LAPIC_DELIVERY_MODE_EXTINT) |
| 47 | ); |
| 48 | lapic_write_around(LAPIC_LVT1, |
| 49 | (lapic_read_around(LAPIC_LVT1) & |
| 50 | ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | |
| 51 | LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | |
| 52 | LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 | |
| 53 | LAPIC_DELIVERY_MODE_MASK)) |
| 54 | | (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | |
| 55 | LAPIC_DELIVERY_MODE_NMI) |
| 56 | ); |
| 57 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame^] | 58 | printk(BIOS_DEBUG, " apic_id: 0x%02lx ", lapicid()); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 59 | |
| 60 | #else /* !NEED_LLAPIC */ |
| 61 | /* Only Pentium Pro and later have those MSR stuff */ |
| 62 | msr_t msr; |
| 63 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame^] | 64 | printk(BIOS_INFO, "Disabling local apic..."); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 65 | |
| 66 | msr = rdmsr(LAPIC_BASE_MSR); |
| 67 | msr.lo &= ~LAPIC_BASE_MSR_ENABLE; |
| 68 | wrmsr(LAPIC_BASE_MSR, msr); |
| 69 | #endif /* !NEED_LAPIC */ |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame^] | 70 | printk(BIOS_INFO, "done.\n"); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 71 | post_code(0x9b); |
| 72 | } |