V Sowmya | ce07b5c | 2020-12-17 08:03:03 +0530 | [diff] [blame] | 1 | chip soc/intel/alderlake |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 2 | |
V Sowmya | ce07b5c | 2020-12-17 08:03:03 +0530 | [diff] [blame] | 3 | device cpu_cluster 0 on |
| 4 | device lapic 0 on end |
| 5 | end |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 6 | |
| 7 | # GPE configuration |
| 8 | # Note that GPE events called out in ASL code rely on this |
| 9 | # route. i.e. If this route changes then the affected GPE |
| 10 | # offset bits also need to be changed. |
| 11 | register "pmc_gpe0_dw0" = "GPP_C" |
| 12 | register "pmc_gpe0_dw1" = "GPP_D" |
| 13 | register "pmc_gpe0_dw2" = "GPP_E" |
| 14 | |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 15 | # TCSS |
| 16 | register "TcssAuxOri" = "1" |
Deepti Deshatty | 8e7facf | 2021-05-12 17:45:37 +0530 | [diff] [blame] | 17 | register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_A5, .pad_auxn_dc = GPP_A6}" |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 18 | |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 19 | # Enable heci communication |
| 20 | register "HeciEnabled" = "1" |
| 21 | |
Sridhar Siricilla | fce0954 | 2021-04-08 13:27:13 +0530 | [diff] [blame] | 22 | # Enable CNVi Bluetooth |
| 23 | register "CnviBtCore" = "true" |
| 24 | |
| 25 | |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 26 | # FSP configuration |
| 27 | register "SaGv" = "SaGv_Disabled" |
| 28 | |
| 29 | # S0ix enable |
| 30 | register "s0ix_enable" = "1" |
| 31 | |
| 32 | register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # Type-A Port A0 |
| 33 | register "usb2_ports[1]" = "USB2_PORT_MID(OC2)" # Type-A Port A1 |
| 34 | register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN |
| 35 | register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # Type-A / Type-C Cl |
| 36 | register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera |
| 37 | register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # Type-A / Type-C Co |
| 38 | register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth |
| 39 | |
| 40 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)" # USB3/2 Type A port A0 |
| 41 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type A port A1 |
| 42 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN |
| 43 | |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 44 | # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f |
| 45 | register "gen1_dec" = "0x00fc0801" |
| 46 | register "gen2_dec" = "0x000c0201" |
| 47 | # EC memory map range is 0x900-0x9ff |
| 48 | register "gen3_dec" = "0x00fc0901" |
V Sowmya | 738aaa2 | 2021-01-20 07:15:37 +0530 | [diff] [blame] | 49 | |
| 50 | # Enable PCH PCIE RP 5 using CLK 1 |
| 51 | register "pch_pcie_rp[PCH_RP(5)]" = "{ |
| 52 | .clk_src = 1, |
| 53 | .clk_req = 1, |
| 54 | .flags = PCIE_RP_CLK_REQ_DETECT, |
| 55 | }" |
| 56 | |
| 57 | # Enable NVMe PCIE 9 using clk 0 |
| 58 | register "pch_pcie_rp[PCH_RP(9)]" = "{ |
| 59 | .clk_src = 0, |
| 60 | .clk_req = 0, |
| 61 | .flags = PCIE_RP_LTR, |
| 62 | }" |
| 63 | |
| 64 | # Enable SD Card PCIE 8 using clk 3 |
| 65 | register "pch_pcie_rp[PCH_RP(8)]" = "{ |
| 66 | .clk_src = 3, |
| 67 | .clk_req = 3, |
| 68 | .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR, |
| 69 | }" |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 70 | |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 71 | # Enable SATA |
| 72 | register "SataEnable" = "1" |
| 73 | register "SataMode" = "0" |
| 74 | register "SataSalpSupport" = "1" |
| 75 | register "SataPortsEnable[0]" = "0" |
| 76 | register "SataPortsEnable[1]" = "1" |
| 77 | register "SataPortsDevSlp[0]" = "0" |
| 78 | register "SataPortsDevSlp[1]" = "1" |
| 79 | register "SataPortsEnableDitoConfig[1]" = "1" |
| 80 | |
| 81 | register "SerialIoI2cMode" = "{ |
| 82 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 83 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| 84 | [PchSerialIoIndexI2C2] = PchSerialIoPci, |
| 85 | [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| 86 | [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| 87 | [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| 88 | }" |
| 89 | |
| 90 | register "SerialIoGSpiMode" = "{ |
| 91 | [PchSerialIoIndexGSPI0] = PchSerialIoPci, |
Sridhar Siricilla | 72e736d | 2021-04-08 15:47:24 +0530 | [diff] [blame] | 92 | [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 93 | [PchSerialIoIndexGSPI2] = PchSerialIoDisabled, |
| 94 | [PchSerialIoIndexGSPI3] = PchSerialIoDisabled, |
| 95 | }" |
| 96 | |
| 97 | register "SerialIoGSpiCsMode" = "{ |
| 98 | [PchSerialIoIndexGSPI0] = 1, |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 99 | }" |
| 100 | |
| 101 | register "SerialIoGSpiCsState" = "{ |
| 102 | [PchSerialIoIndexGSPI0] = 1, |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 103 | }" |
| 104 | |
| 105 | register "SerialIoUartMode" = "{ |
| 106 | [PchSerialIoIndexUART0] = PchSerialIoPci, |
| 107 | [PchSerialIoIndexUART1] = PchSerialIoDisabled, |
| 108 | [PchSerialIoIndexUART2] = PchSerialIoDisabled, |
| 109 | }" |
| 110 | |
| 111 | # HD Audio |
| 112 | register "PchHdaDspEnable" = "1" |
Sugnan Prabhu S | 50f8b4e | 2021-03-18 22:08:22 +0530 | [diff] [blame] | 113 | register "PchHdaIDispLinkTmode" = "HDA_TMODE_8T" |
| 114 | register "PchHdaIDispLinkFrequency" = "HDA_LINKFREQ_96MHZ" |
| 115 | register "PchHdaIDispCodecEnable" = "1" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 116 | |
| 117 | # DP port |
| 118 | register "DdiPortAConfig" = "1" # eDP |
| 119 | register "DdiPortBConfig" = "0" |
| 120 | |
| 121 | register "DdiPortAHpd" = "1" |
| 122 | register "DdiPortBHpd" = "1" |
| 123 | register "DdiPortCHpd" = "0" |
| 124 | register "DdiPort1Hpd" = "1" |
| 125 | register "DdiPort2Hpd" = "1" |
| 126 | register "DdiPort3Hpd" = "0" |
| 127 | register "DdiPort4Hpd" = "0" |
| 128 | |
| 129 | register "DdiPortADdc" = "0" |
| 130 | register "DdiPortBDdc" = "1" |
| 131 | register "DdiPortCDdc" = "0" |
| 132 | register "DdiPort1Ddc" = "0" |
| 133 | register "DdiPort2Ddc" = "0" |
| 134 | register "DdiPort3Ddc" = "0" |
| 135 | register "DdiPort4Ddc" = "0" |
| 136 | |
| 137 | # Intel Common SoC Config |
| 138 | #+-------------------+---------------------------+ |
| 139 | #| Field | Value | |
| 140 | #+-------------------+---------------------------+ |
| 141 | #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT | |
| 142 | #| GSPI0 | cr50 TPM. Early init is | |
| 143 | #| | required to set up a BAR | |
| 144 | #| | for TPM communication | |
| 145 | #| | before memory is up | |
| 146 | #| GSPI1 | Fingerprint MCU | |
| 147 | #| I2C0 | SAR0, WWAN, HDMI | |
| 148 | #| I2C1 | Camera | |
| 149 | #| I2C2 | Audio | |
| 150 | #| I2C3 | Touchscreen, USI | |
| 151 | #| I2C5 | Trackpad | |
| 152 | #+-------------------+---------------------------+ |
| 153 | register "common_soc_config" = "{ |
| 154 | .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, |
| 155 | .gspi[0] = { |
| 156 | .speed_mhz = 1, |
| 157 | .early_init = 1, |
| 158 | }, |
| 159 | .i2c[0] = { |
| 160 | .speed = I2C_SPEED_FAST, |
| 161 | }, |
| 162 | .i2c[1] = { |
| 163 | .speed = I2C_SPEED_FAST, |
| 164 | }, |
| 165 | .i2c[2] = { |
| 166 | .speed = I2C_SPEED_FAST, |
| 167 | }, |
| 168 | .i2c[3] = { |
| 169 | .speed = I2C_SPEED_FAST, |
| 170 | }, |
| 171 | .i2c[5] = { |
| 172 | .speed = I2C_SPEED_FAST, |
| 173 | }, |
| 174 | }" |
| 175 | |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 176 | device domain 0 on |
| 177 | device pci 00.0 on end # Host Bridge |
| 178 | device pci 02.0 on end # Graphics |
| 179 | device pci 04.0 on end # DPTF |
| 180 | device pci 05.0 on end # IPU |
V Sowmya | a889e2a | 2021-03-24 21:24:47 +0530 | [diff] [blame] | 181 | device pci 06.0 off end # PEG60 |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 182 | device pci 07.0 on end # TBT_PCIe0 |
| 183 | device pci 07.1 on end # TBT_PCIe1 |
| 184 | device pci 07.2 on end # TBT_PCIe2 |
| 185 | device pci 07.3 on end # TBT_PCIe3 |
| 186 | device pci 08.0 off end # GNA |
| 187 | device pci 09.0 off end # NPK |
| 188 | device pci 0a.0 off end # Crash-log SRAM |
| 189 | device pci 0d.0 on end # USB xHCI |
Sugnan Prabhu S | 565359f | 2021-03-05 16:29:29 +0530 | [diff] [blame] | 190 | device pci 0d.1 off end # USB xDCI (OTG) |
John Zhao | 7e982b1 | 2021-05-13 23:08:16 -0700 | [diff] [blame] | 191 | device pci 0d.2 on |
| 192 | chip drivers/intel/usb4/retimer |
| 193 | register "dfp" = "{ |
| 194 | [0] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H19),}, |
| 195 | [1] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H19),}}" |
| 196 | device generic 0 on end |
| 197 | end |
| 198 | end |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 199 | device pci 0d.3 on end # TBT DMA1 |
| 200 | device pci 0e.0 off end # VMD |
| 201 | device pci 10.0 off end |
| 202 | device pci 10.1 off end |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 203 | device pci 12.0 off end # SensorHUB |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 204 | device pci 12.6 off end # GSPI2 |
| 205 | device pci 13.0 off end # GSPI3 |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 206 | device pci 14.0 on |
| 207 | chip drivers/usb/acpi |
| 208 | register "desc" = ""Root Hub"" |
| 209 | register "type" = "UPC_TYPE_HUB" |
| 210 | device usb 0.0 on |
| 211 | chip drivers/usb/acpi |
| 212 | register "desc" = ""Bluetooth"" |
| 213 | register "type" = "UPC_TYPE_INTERNAL" |
Aamir Bohra | 7f61e57 | 2021-03-06 11:26:13 +0530 | [diff] [blame] | 214 | register "reset_gpio" = |
| 215 | "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)" |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 216 | device usb 2.9 on end |
| 217 | end |
| 218 | end |
| 219 | end |
| 220 | end # USB3.1 xHCI |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 221 | device pci 14.1 off end # USB3.1 xDCI |
| 222 | device pci 14.2 off end # Shared RAM |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 223 | device pci 14.3 on |
| 224 | chip drivers/wifi/generic |
| 225 | register "wake" = "GPE0_PME_B0" |
| 226 | device generic 0 on end |
| 227 | end |
| 228 | end # CNVi: WiFi |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 229 | device pci 15.0 on end # I2C0 |
| 230 | device pci 15.1 on end # I2C1 |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 231 | device pci 15.2 on |
| 232 | chip drivers/i2c/generic |
| 233 | register "hid" = ""10EC5682"" |
| 234 | register "name" = ""RT58"" |
| 235 | register "desc" = ""Headset Codec"" |
| 236 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F9)" |
| 237 | # Set the jd_src to RT5668_JD1 for jack detection |
| 238 | register "property_count" = "1" |
| 239 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 240 | register "property_list[0].name" = ""realtek,jd-src"" |
| 241 | register "property_list[0].integer" = "1" |
| 242 | device i2c 1a on end |
| 243 | end |
| 244 | chip drivers/i2c/max98373 |
| 245 | register "vmon_slot_no" = "0" |
| 246 | register "imon_slot_no" = "1" |
| 247 | register "uid" = "0" |
| 248 | register "desc" = ""Right Speaker Amp"" |
| 249 | register "name" = ""MAXR"" |
| 250 | device i2c 31 on end |
| 251 | end |
| 252 | chip drivers/i2c/max98373 |
| 253 | register "vmon_slot_no" = "2" |
| 254 | register "imon_slot_no" = "3" |
| 255 | register "uid" = "1" |
| 256 | register "desc" = ""Left Speaker Amp"" |
| 257 | register "name" = ""MAXL"" |
| 258 | device i2c 32 on end |
| 259 | end |
| 260 | end # I2C2 |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 261 | device pci 15.3 on end # I2C3 |
Sridhar Siricilla | d742d02 | 2021-04-16 13:08:38 +0530 | [diff] [blame] | 262 | device pci 16.0 on end # HECI1 |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 263 | device pci 16.1 off end # HECI2 |
| 264 | device pci 16.2 off end # CSME |
| 265 | device pci 16.3 off end # CSME |
| 266 | device pci 16.4 off end # HECI3 |
| 267 | device pci 16.5 off end # HECI4 |
| 268 | device pci 17.0 on end # SATA |
| 269 | device pci 19.0 off end # I2C4 |
V Sowmya | ae930d8 | 2021-01-20 07:55:20 +0530 | [diff] [blame] | 270 | device pci 19.1 on |
| 271 | chip drivers/i2c/generic |
| 272 | register "hid" = ""ELAN0000"" |
| 273 | register "desc" = ""ELAN Touchpad"" |
| 274 | register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E15_IRQ)" |
| 275 | register "wake" = "GPE0_DW2_15" |
| 276 | register "probed" = "1" |
| 277 | device i2c 15 on end |
| 278 | end |
| 279 | end # I2C5 |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 280 | device pci 19.2 off end # UART2 |
| 281 | device pci 1c.0 off end # RP1 |
| 282 | device pci 1c.1 off end # RP2 |
| 283 | device pci 1c.2 off end # RP3 |
| 284 | device pci 1c.3 off end # RP4 |
| 285 | device pci 1c.4 on end # RP5 |
| 286 | device pci 1c.5 off end # RP6 |
| 287 | device pci 1c.6 off end # RP7 |
Rizwan Qureshi | 9452aab | 2021-04-06 20:05:04 +0530 | [diff] [blame] | 288 | device pci 1c.7 on |
| 289 | chip soc/intel/common/block/pcie/rtd3 |
| 290 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H3)" |
| 291 | register "srcclk_pin" = "3" |
| 292 | device generic 0 on end |
| 293 | end |
| 294 | end # RP8 |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 295 | device pci 1d.0 on end # RP9 |
| 296 | device pci 1d.1 off end # RP10 |
| 297 | device pci 1d.2 off end # RP11 |
| 298 | device pci 1d.3 off end # RP12 |
| 299 | device pci 1e.0 on end # UART0 |
| 300 | device pci 1e.1 off end # UART1 |
Aamir Bohra | c63a9fb | 2021-02-25 15:02:35 +0530 | [diff] [blame] | 301 | device pci 1e.2 on |
| 302 | chip drivers/spi/acpi |
| 303 | register "hid" = "ACPI_DT_NAMESPACE_HID" |
| 304 | register "compat_string" = ""google,cr50"" |
| 305 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C3_IRQ)" |
| 306 | device spi 0 on end |
| 307 | end |
| 308 | end # GSPI0 |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 309 | device pci 1e.3 off end # GSPI1 |
| 310 | device pci 1f.0 on |
| 311 | chip ec/google/chromeec |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 312 | use conn0 as mux_conn[0] |
| 313 | use conn1 as mux_conn[1] |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 314 | device pnp 0c09.0 on end |
| 315 | end |
| 316 | end # eSPI |
| 317 | device pci 1f.1 on end # P2SB |
V Sowmya | 8cb7af8 | 2021-02-23 13:31:34 +0530 | [diff] [blame] | 318 | device pci 1f.2 hidden |
| 319 | # The pmc_mux chip driver is a placeholder for the |
| 320 | # PMC.MUX device in the ACPI hierarchy. |
| 321 | chip drivers/intel/pmc_mux |
| 322 | device generic 0 on |
| 323 | chip drivers/intel/pmc_mux/conn |
| 324 | register "usb2_port_number" = "6" |
| 325 | register "usb3_port_number" = "1" |
| 326 | # SBU is fixed, HSL follows CC |
| 327 | register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" |
| 328 | device generic 0 alias conn0 on end |
| 329 | end |
| 330 | chip drivers/intel/pmc_mux/conn |
| 331 | register "usb2_port_number" = "4" |
| 332 | register "usb3_port_number" = "2" |
| 333 | # SBU is fixed, HSL follows CC |
| 334 | register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" |
| 335 | device generic 1 alias conn1 on end |
| 336 | end |
| 337 | end |
| 338 | end |
| 339 | end # PMC |
V Sowmya | 1b150cb | 2021-01-15 14:01:54 +0530 | [diff] [blame] | 340 | device pci 1f.3 on end # Intel Audio SNDW |
| 341 | device pci 1f.4 on end # SMBus |
| 342 | device pci 1f.5 on end # SPI |
| 343 | device pci 1f.6 off end # GbE |
| 344 | end |
V Sowmya | ce07b5c | 2020-12-17 08:03:03 +0530 | [diff] [blame] | 345 | end |