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review.coreboot.org / coreboot / bfb11bec3b3fec638adf864a9b9b2cff6671fed8 / . / src / superio / smsc / kbc1100 / early_init.c
blob: 2210c2bf597bb5d6b6a2b8c847e88eb28fde4230 [file] [log] [blame]
Felix Held3f3eca92020-01-23 17:12:32 +0100[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]2
3/* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */
4
Stefan Reinauer24d1d4b2013-03-21 11:51:41 -0700[diff] [blame]5#include <arch/io.h>
Kyösti Mälkki3855c012019-03-03 08:45:19 +0200[diff] [blame]6#include <device/pnp_ops.h>
Edward O'Callaghanf5bde442014-06-02 12:20:11 +1000[diff] [blame]7#include <device/pnp.h>
8#include <stdint.h>
9
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]10#include "kbc1100.h"
11
Edward O'Callaghan85836c22014-07-09 20:26:25 +1000[diff] [blame]12static void pnp_enter_conf_state(pnp_devfn_t dev)
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]13{
Edward O'Callaghanf5bde442014-06-02 12:20:11 +1000[diff] [blame]14 u16 port = dev >> 8;
15 outb(0x55, port);
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]16}
17
Edward O'Callaghan85836c22014-07-09 20:26:25 +1000[diff] [blame]18static void pnp_exit_conf_state(pnp_devfn_t dev)
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]19{
Edward O'Callaghanf5bde442014-06-02 12:20:11 +1000[diff] [blame]20 u16 port = dev >> 8;
21 outb(0xaa, port);
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]22}
23
Edward O'Callaghan85836c22014-07-09 20:26:25 +1000[diff] [blame]24void kbc1100_early_serial(pnp_devfn_t dev, u16 iobase)
Edward O'Callaghanf5bde442014-06-02 12:20:11 +1000[diff] [blame]25{
26 pnp_enter_conf_state(dev);
27 pnp_set_logical_device(dev);
28 pnp_set_enable(dev, 0);
29 pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
30 pnp_set_enable(dev, 1);
31 pnp_exit_conf_state(dev);
32}
33
34void kbc1100_early_init(u16 port)
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]35{
Arthur Heymans12d01032017-08-01 21:51:10 +0200[diff] [blame]36 pnp_devfn_t dev;
37 dev = PNP_DEV(port, KBC1100_KBC);
38 pnp_enter_conf_state(dev);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]39
Arthur Heymans12d01032017-08-01 21:51:10 +0200[diff] [blame]40 /* Serial IRQ enabled */
41 outb(0x25, port);
42 outb(0x04, port + 1);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]43
Arthur Heymans12d01032017-08-01 21:51:10 +0200[diff] [blame]44 /* Enable keyboard */
45 pnp_set_logical_device(dev);
46 pnp_set_enable(dev, 0);
47 pnp_set_iobase(dev, PNP_IDX_IO0, 0x60);
48 pnp_set_iobase(dev, PNP_IDX_IO1, 0x64);
Elyes HAOUAS9b54dfa2020-08-26 18:36:13 +0200[diff] [blame]49 pnp_set_irq(dev, PNP_IDX_IRQ0, 1); /* IRQ 1 */
50 pnp_set_irq(dev, PNP_IDX_IRQ1, 12); /* IRQ 12 */
Arthur Heymans12d01032017-08-01 21:51:10 +0200[diff] [blame]51 pnp_set_enable(dev, 1);
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]52
Arthur Heymans12d01032017-08-01 21:51:10 +0200[diff] [blame]53 /* Enable EC Channel 0 */
54 dev = PNP_DEV(port, KBC1100_EC0);
55 pnp_set_logical_device(dev);
56 pnp_set_enable(dev, 1);
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]57
Arthur Heymans12d01032017-08-01 21:51:10 +0200[diff] [blame]58 pnp_exit_conf_state(dev);
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]59
Arthur Heymans12d01032017-08-01 21:51:10 +0200[diff] [blame]60 /* disable the 1s timer */
61 outb(0xE7, 0x64);
Frank Vibrans7b904d82011-02-14 19:00:13 +0000[diff] [blame]62}