| Felix Held | 3f3eca9 | 2020-01-23 17:12:32 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 2 | |
| Edward O'Callaghan | 6d51f6b | 2014-04-23 17:01:45 +1000 | [diff] [blame] | 3 | #ifndef SUPERIO_FINTEK_F71869AD_H |
| 4 | #define SUPERIO_FINTEK_F71869AD_H |
| Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 5 | |
| 6 | /* Logical Device Numbers (LDN). */ |
| Elyes HAOUAS | 8dcadc9 | 2020-03-30 16:44:54 +0200 | [diff] [blame] | 7 | #define F71869AD_FDC 0x00 /* Floppy */ |
| 8 | #define F71869AD_SP1 0x01 /* UART1 */ |
| 9 | #define F71869AD_SP2 0x02 /* UART2 */ |
| 10 | #define F71869AD_PP 0x03 /* Parallel port */ |
| 11 | #define F71869AD_HWM 0x04 /* Hardware monitor */ |
| 12 | #define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */ |
| 13 | #define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */ |
| 14 | #define F71869AD_WDT 0x07 /* WDT */ |
| 15 | #define F71869AD_CIR 0x08 /* CIR */ |
| 16 | #define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */ |
| Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 17 | |
| Edward O'Callaghan | 6d51f6b | 2014-04-23 17:01:45 +1000 | [diff] [blame] | 18 | #endif /* SUPERIO_FINTEK_F71869AD_H */ |