| Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 2 | |
| Kyösti Mälkki | de64078 | 2019-12-03 07:30:26 +0200 | [diff] [blame] | 3 | #include <arch/bootblock.h> |
| Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
| Angel Pons | 40783f2 | 2020-06-21 18:03:00 +0200 | [diff] [blame] | 5 | #include <southbridge/intel/common/early_spi.h> |
| Arthur Heymans | 349e085 | 2017-04-09 20:48:37 +0200 | [diff] [blame] | 6 | #include "i82801jx.h" |
| Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 7 | |
| Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 8 | void bootblock_early_southbridge_init(void) |
| Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 9 | { |
| Angel Pons | 40783f2 | 2020-06-21 18:03:00 +0200 | [diff] [blame] | 10 | enable_spi_prefetching_and_caching(); |
| Arthur Heymans | 349e085 | 2017-04-09 20:48:37 +0200 | [diff] [blame] | 11 | |
| Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 12 | i82801jx_setup_bars(); |
| Arthur Heymans | 87074f9 | 2019-11-11 19:58:26 +0100 | [diff] [blame] | 13 | |
| 14 | /* Enable upper 128bytes of CMOS. */ | ||||
| 15 | RCBA32(0x3400) = (1 << 2); | ||||
| Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 16 | |
| 17 | i82801jx_lpc_setup(); | ||||
| Arthur Heymans | 7b9c139 | 2017-04-09 20:40:39 +0200 | [diff] [blame] | 18 | } |