blob: abec986dbee94c864dc0f15e5b5cb8578dddbcaa [file] [log] [blame]
Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03002
3// Use simple device model for this file even in ramstage
4#define __SIMPLE_DEVICE__
5
6#include <stdint.h>
Felix Held0f5f2ce2023-07-14 19:36:20 +02007#include <amdblocks/acpimmio.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02008#include <device/mmio.h>
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03009#include <device/pci_ehci.h>
10#include <device/pci_def.h>
11#include "hudson.h"
12
13#define DEBUGPORT_MISC_CONTROL 0x80
14
15pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
16{
Kyösti Mälkki6683e402017-07-30 13:23:32 +030017 /* Enable all of the USB controllers */
Felix Held0f5f2ce2023-07-14 19:36:20 +020018 pm_io_write8(0xef, 0x7f);
Kyösti Mälkki6683e402017-07-30 13:23:32 +030019
Elyes HAOUASc021ffe2016-09-18 19:18:56 +020020 if (hcd_idx == 3)
Kyösti Mälkki55ed6722015-06-08 16:39:52 +030021 return PCI_DEV(0, 0x16, 0);
Elyes HAOUASc021ffe2016-09-18 19:18:56 +020022 else if (hcd_idx == 2)
Kyösti Mälkki55ed6722015-06-08 16:39:52 +030023 return PCI_DEV(0, 0x13, 0);
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030024 else
Kyösti Mälkki55ed6722015-06-08 16:39:52 +030025 return PCI_DEV(0, 0x12, 0);
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030026}
27
28void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
29{
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080030 u8 *base_regs = pci_ehci_base_regs(dev);
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030031 u32 reg32;
32
33 /* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */
34 reg32 = read32(base_regs + DEBUGPORT_MISC_CONTROL);
35 reg32 &= ~(0xf << 28);
36 reg32 |= (port << 28);
37 reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */
38 write32(base_regs + DEBUGPORT_MISC_CONTROL, reg32);
39}