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Angel Pons182dbde2020-04-02 23:49:05 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +03002
3#ifndef AMD_PCI_INT_TYPES_H
4#define AMD_PCI_INT_TYPES_H
5
Elyes HAOUAS251279c2018-07-08 12:41:56 +02006const char *intr_types[] = {
Dave Frodin9cfa7422015-01-27 07:19:48 -07007 [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t",
8 [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD",
Dave Frodin4675c598a2015-02-06 07:25:11 -07009 [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", "SD\t\t",
Dave Frodin9cfa7422015-01-27 07:19:48 -070010 [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t",
11 [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", "Dev20.5 INTC",
Dave Frodin4675c598a2015-02-06 07:25:11 -070012 [0x7F] = "RSVD\t",
Julius Wernercd49cce2019-03-05 16:53:33 -080013#if CONFIG(SOUTHBRIDGE_AMD_PI_AVALON)
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030014 [0x40] = "RSVD\t", "SATA\t",
15 [0x60] = "RSVD\t", "RSVD\t", "GPIO\t",
Julius Wernercd49cce2019-03-05 16:53:33 -080016#elif CONFIG(SOUTHBRIDGE_AMD_PI_KERN)
WANG Siyuanf2dfef02015-05-20 14:41:01 +080017 [0x40] = "IDE\t", "SATA\t",
18 [0x50] = "GPPInt0\t", "GPPInt1\t", "GPPInt2\t", "GPPInt3\t",
WANG Siyuan839d68f2015-08-18 06:22:22 +080019 [0x62] = "GPIO\t",
Elyes Haouas4c152112022-07-16 09:51:03 +020020 [0x70] = "I2C0\t", "I2C1\t", "I2C2\t", "I2C3\t", "UART0\t", "UART1\t",
Dave Frodin9cfa7422015-01-27 07:19:48 -070021#endif
Dave Frodin4675c598a2015-02-06 07:25:11 -070022};
Kyösti Mälkkie8b4da22014-10-21 18:22:32 +030023
24#endif /* AMD_PCI_INT_TYPES_H */