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Housong Zhang7c14ff02021-11-01 11:00:09 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3/*
4 * This file is created based on MT8186 Functional Specification
5 * Chapter number: 5.10
6 */
7
8#include <assert.h>
9#include <console/console.h>
10#include <device/mmio.h>
11#include <device/i2c_simple.h>
Elyes Haouas5316abe2023-01-11 09:46:57 +010012#include <gpio.h>
Housong Zhang7c14ff02021-11-01 11:00:09 +080013#include <soc/i2c.h>
Housong Zhang7c14ff02021-11-01 11:00:09 +080014
15struct mtk_i2c mtk_i2c_bus_controller[] = {
16 [0] = {
17 .i2c_regs = (void *)(I2C0_BASE),
18 .i2c_dma_regs = (void *)(I2C0_DMA_BASE),
19 },
20 [1] = {
21 .i2c_regs = (void *)(I2C1_BASE),
22 .i2c_dma_regs = (void *)(I2C1_DMA_BASE),
23 },
24 [2] = {
25 .i2c_regs = (void *)(I2C2_BASE),
26 .i2c_dma_regs = (void *)(I2C2_DMA_BASE),
27 },
28 [3] = {
29 .i2c_regs = (void *)(I2C3_BASE),
30 .i2c_dma_regs = (void *)(I2C3_DMA_BASE),
31 },
32 [4] = {
33 .i2c_regs = (void *)(I2C4_BASE),
34 .i2c_dma_regs = (void *)(I2C4_DMA_BASE),
35 },
36 [5] = {
37 .i2c_regs = (void *)(I2C5_BASE),
38 .i2c_dma_regs = (void *)(I2C5_DMA_BASE),
39 },
40 [6] = {
41 .i2c_regs = (void *)(I2C6_BASE),
42 .i2c_dma_regs = (void *)(I2C6_DMA_BASE),
43 },
44 [7] = {
45 .i2c_regs = (void *)(I2C7_BASE),
46 .i2c_dma_regs = (void *)(I2C7_DMA_BASE),
47 },
48 [8] = {
49 .i2c_regs = (void *)(I2C8_BASE),
50 .i2c_dma_regs = (void *)(I2C8_DMA_BASE),
51 },
52 [9] = {
53 .i2c_regs = (void *)(I2C9_BASE),
54 .i2c_dma_regs = (void *)(I2C9_DMA_BASE),
55 },
56};
57
58_Static_assert(ARRAY_SIZE(mtk_i2c_bus_controller) == I2C_BUS_NUMBER,
59 "Wrong size of mtk_i2c_bus_controller");
60
61struct pad_func {
62 gpio_t gpio;
63 u8 func;
64};
65
66#define PAD_FUNC(name, func) {GPIO(name), PAD_##name##_FUNC_##func}
67
68static const struct pad_func i2c_funcs[I2C_BUS_NUMBER][2] = {
69 [0] = {
70 PAD_FUNC(SDA0, SDA0),
71 PAD_FUNC(SCL0, SCL0),
72 },
73 [1] = {
74 PAD_FUNC(SDA1, SDA1),
75 PAD_FUNC(SCL1, SCL1),
76 },
77 [2] = {
78 PAD_FUNC(SDA2, SDA2),
79 PAD_FUNC(SCL2, SCL2),
80 },
81 [3] = {
82 PAD_FUNC(SDA3, SDA3),
83 PAD_FUNC(SCL3, SCL3),
84 },
85 [4] = {
86 PAD_FUNC(SDA4, SDA4),
87 PAD_FUNC(SCL4, SCL4),
88 },
89 [5] = {
90 PAD_FUNC(SDA5, SDA5),
91 PAD_FUNC(SCL5, SCL5),
92 },
93 [6] = {
94 PAD_FUNC(SDA6, SDA6),
95 PAD_FUNC(SCL6, SCL6),
96 },
97 [7] = {
98 PAD_FUNC(SDA7, SDA7),
99 PAD_FUNC(SCL7, SCL7),
100 },
101 [8] = {
102 PAD_FUNC(SDA8, SDA8),
103 PAD_FUNC(SCL8, SCL8),
104 },
105 [9] = {
106 PAD_FUNC(SDA9, SDA9),
107 PAD_FUNC(SCL9, SCL9),
108 },
109};
110
111static void mtk_i2c_set_gpio_pinmux(uint8_t bus)
112{
113 assert(bus < I2C_BUS_NUMBER);
114
115 const struct pad_func *ptr = i2c_funcs[bus];
116 for (size_t i = 0; i < 2; i++) {
117 gpio_set_mode(ptr[i].gpio, ptr[i].func);
118 gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, GPIO_PULL_UP);
119 }
120}
121
122void mtk_i2c_bus_init(uint8_t bus, uint32_t speed)
123{
124 mtk_i2c_speed_init(bus, speed);
125 mtk_i2c_set_gpio_pinmux(bus);
126}
127
128void mtk_i2c_dump_more_info(struct mt_i2c_regs *regs)
129{
130 printk(BIOS_DEBUG, "LTIMING %x\nCLK_DIV %x\n",
131 read32(&regs->ltiming),
132 read32(&regs->clock_div));
133}
134
135void mtk_i2c_config_timing(struct mt_i2c_regs *regs, struct mtk_i2c *bus_ctrl)
136{
137 write32(&regs->clock_div, bus_ctrl->ac_timing.inter_clk_div);
138 write32(&regs->timing, bus_ctrl->ac_timing.htiming);
139 write32(&regs->ltiming, bus_ctrl->ac_timing.ltiming);
140 write32(&regs->hs, bus_ctrl->ac_timing.hs);
141 write32(&regs->ext_conf, bus_ctrl->ac_timing.ext);
142}