| Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
| Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 2 | |
| 3 | ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) |
| 4 | |
| Jonathan Zhang | b7cf7d3 | 2020-04-02 20:03:48 -0700 | [diff] [blame] | 5 | subdirs-y += ../../../../cpu/intel/turbo |
| Andrey Petrov | 8670e82 | 2020-03-30 12:25:06 -0700 | [diff] [blame] | 6 | subdirs-y += ../../../../cpu/intel/microcode |
| Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 7 | |
| Jonathan Zhang | ca520a7 | 2023-01-23 18:14:53 -0800 | [diff] [blame] | 8 | romstage-y += romstage.c ddr.c soc_util.c |
| Jonathan Zhang | ed624c7 | 2020-05-12 15:58:45 -0700 | [diff] [blame] | 9 | romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c |
| Jonathan Zhang | 29f61a2 | 2020-06-26 14:42:11 -0700 | [diff] [blame] | 10 | romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c |
| Jonathan Zhang | ed624c7 | 2020-05-12 15:58:45 -0700 | [diff] [blame] | 11 | |
| Dinesh Gehlot | d4f2d14 | 2022-12-16 09:21:18 +0000 | [diff] [blame] | 12 | ramstage-y += chip.c cpu.c soc_util.c soc_acpi.c |
| Jonathan Zhang | 29f61a2 | 2020-06-26 14:42:11 -0700 | [diff] [blame] | 13 | ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c |
| Jonathan Zhang | ed624c7 | 2020-05-12 15:58:45 -0700 | [diff] [blame] | 14 | ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c |
| Tim Chu | 3ba1621 | 2022-12-14 11:27:52 +0000 | [diff] [blame] | 15 | smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c |
| Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 16 | |
| 17 | CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx |
| Arthur Heymans | ffa61b0 | 2021-09-07 14:16:50 +0200 | [diff] [blame] | 18 | CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cooperlake_sp |
| Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 19 | |
| Arthur Heymans | c2d0a49 | 2021-09-07 11:23:40 +0200 | [diff] [blame] | 20 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b |
| 21 | |
| Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 22 | endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP |