Angel Pons | 80d9238 | 2020-04-05 15:47:00 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 5 | #include <console/console.h> |
Subrata Banik | fac11d0 | 2022-02-17 20:40:55 +0530 | [diff] [blame] | 6 | #include <cpu/x86/smm.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 7 | #include <device/device.h> |
Michael Niewöhner | 68bacc2 | 2021-09-24 23:57:37 +0200 | [diff] [blame] | 8 | #include <device/mmio.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 9 | #include <device/pci.h> |
| 10 | #include <device/pci_ids.h> |
Subrata Banik | fac11d0 | 2022-02-17 20:40:55 +0530 | [diff] [blame] | 11 | #include <intelblocks/pmc.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 12 | #include <soc/iomap.h> |
Subrata Banik | fac11d0 | 2022-02-17 20:40:55 +0530 | [diff] [blame] | 13 | #include <soc/pm.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 14 | #include <soc/pmc.h> |
| 15 | #include <soc/pci_devs.h> |
| 16 | #include <soc/ramstage.h> |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 17 | |
Elyes HAOUAS | 2ec4183 | 2018-05-27 17:40:58 +0200 | [diff] [blame] | 18 | static void pch_power_options(struct device *dev) { /* TODO */ } |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 19 | |
Subrata Banik | fac11d0 | 2022-02-17 20:40:55 +0530 | [diff] [blame] | 20 | /* Fill up PMC resource structure */ |
| 21 | int pmc_soc_get_resources(struct pmc_resource_config *cfg) |
| 22 | { |
| 23 | cfg->pwrmbase_offset = PMC_PWRM_BASE; |
| 24 | cfg->pwrmbase_addr = DEFAULT_PWRM_BASE; |
| 25 | cfg->pwrmbase_size = DEFAULT_PWRM_SIZE; |
| 26 | cfg->abase_offset = PMC_ACPI_BASE; |
| 27 | cfg->abase_addr = DEFAULT_PMBASE; |
| 28 | cfg->abase_size = DEFAULT_PMBASE_SIZE; |
| 29 | |
| 30 | return 0; |
| 31 | } |
| 32 | |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 33 | static void pch_set_acpi_mode(void) |
| 34 | { |
Kyösti Mälkki | ad882c3 | 2020-06-02 05:05:30 +0300 | [diff] [blame] | 35 | if (!acpi_is_wakeup_s3()) { |
Kyösti Mälkki | b658548 | 2020-06-01 15:11:14 +0300 | [diff] [blame] | 36 | apm_control(APM_CNT_ACPI_DISABLE); |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 37 | } |
| 38 | } |
| 39 | |
Subrata Banik | fac11d0 | 2022-02-17 20:40:55 +0530 | [diff] [blame] | 40 | void pmc_soc_init(struct device *dev) |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 41 | { |
Subrata Banik | fac11d0 | 2022-02-17 20:40:55 +0530 | [diff] [blame] | 42 | uint32_t pwrm_base = pci_read_config32(dev, PMC_PWRM_BASE) & MASK_PMC_PWRM_BASE; |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 43 | |
Subrata Banik | fac11d0 | 2022-02-17 20:40:55 +0530 | [diff] [blame] | 44 | printk(BIOS_DEBUG, "pch: %s\n", __func__); |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 45 | |
| 46 | /* Set the value for PCI command register. */ |
| 47 | pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | |
| 48 | PCI_COMMAND_MEMORY | |
| 49 | PCI_COMMAND_IO); |
| 50 | |
| 51 | /* Setup power options. */ |
| 52 | pch_power_options(dev); |
| 53 | |
| 54 | /* Configure ACPI mode. */ |
| 55 | pch_set_acpi_mode(); |
Michael Niewöhner | 68bacc2 | 2021-09-24 23:57:37 +0200 | [diff] [blame] | 56 | |
| 57 | /* |
| 58 | * Disable ACPI PM timer based on Kconfig |
| 59 | * |
| 60 | * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. |
| 61 | * Disabling ACPI PM timer also switches off TCO. |
| 62 | */ |
| 63 | if (!CONFIG(USE_PM_ACPI_TIMER)) |
| 64 | setbits8((volatile void *)(uintptr_t)(pwrm_base + PCH_PWRM_ACPI_TMR_CTL), |
| 65 | ACPI_TIM_DIS); |
Mariusz Szafranski | a404133 | 2017-08-02 17:28:17 +0200 | [diff] [blame] | 66 | } |