blob: 94920dfc6367a2d414018f17472a4dc545d49545 [file] [log] [blame]
Jes B. Klinkec6b041a12022-04-19 14:00:33 -07001config MEMORY_MAPPED_TPM
Philipp Deppenwiesec07f8fb2018-02-27 19:40:52 +01002 bool
Duncan Laurie1ab1eac2014-10-30 15:11:48 -07003 default n
4 help
Jes B. Klinkec6b041a12022-04-19 14:00:33 -07005 Board has memory mapped TPM support
Kyösti Mälkki542cffa2020-05-29 19:42:07 +03006
Jes B. Klinkec6b041a12022-04-19 14:00:33 -07007if MEMORY_MAPPED_TPM
Duncan Lauriedd281ed2014-10-30 15:20:19 -07008
9config TPM_TIS_BASE_ADDRESS
Vladimir Serbinenko2305e682015-05-20 12:05:39 +020010 hex
Duncan Lauriedd281ed2014-10-30 15:20:19 -070011 default 0xfed40000
12 help
13 This can be used to adjust the TPM memory base address.
14 The default is specified by the TCG PC Client Specific TPM
15 Interface Specification 1.2 and should not be changed unless
16 the TPM being used does not conform to TPM TIS 1.2.
Vladimir Serbinenko0e90dae2015-05-18 10:29:06 +020017
Duncan Laurie8b11b2c2015-10-06 10:51:10 -070018config TPM_PIRQ
19 hex
Martin Roth3b878122016-09-30 14:43:01 -060020 default 0x0
Duncan Laurie8b11b2c2015-10-06 10:51:10 -070021 help
22 This can be used to specify a PIRQ to use instead of SERIRQ,
23 which is needed for SPI TPM interrupt support on x86.
24
Kyösti Mälkki542cffa2020-05-29 19:42:07 +030025endif