Mario Scheithauer | 1a97c89 | 2022-11-08 13:50:06 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Jan Samek | edda0f9 | 2023-04-27 10:39:27 +0200 | [diff] [blame] | 3 | #ifndef __DRIVERS_NET_PHY_M88E1512_CHIP_H__ |
| 4 | #define __DRIVERS_NET_PHY_M88E1512_CHIP_H__ |
| 5 | |
Mario Scheithauer | 1a97c89 | 2022-11-08 13:50:06 +0100 | [diff] [blame] | 6 | #include "m88e1512.h" |
| 7 | |
| 8 | struct drivers_net_phy_m88e1512_config { |
| 9 | bool configure_leds; /* Enable LED customization */ |
| 10 | unsigned char led_0_ctrl; /* LED[0] Control */ |
| 11 | unsigned char led_1_ctrl; /* LED[1] Control */ |
| 12 | unsigned char led_2_ctrl; /* LED[2] Control */ |
Mario Scheithauer | 155cf5c | 2022-11-10 09:34:57 +0100 | [diff] [blame] | 13 | bool enable_int; /* INTn can be routed to LED[2] pin */ |
Mario Scheithauer | 16dd1c3 | 2022-11-21 16:22:03 +0100 | [diff] [blame] | 14 | /* 1x, 2x,...8x is the number of times the PHY attempts to establish Gigabit link |
| 15 | before the PHY downshifts to the next highest speed. */ |
| 16 | unsigned char downshift_cnt; |
Mario Scheithauer | 481bfe6 | 2023-01-25 11:43:51 +0100 | [diff] [blame] | 17 | bool force_mos; /* Force PMOS/NMOS manually */ |
| 18 | unsigned char pmos_val; /* Set PMOS calibration value */ |
| 19 | unsigned char nmos_val; /* Set NMOS calibration value */ |
Mario Scheithauer | 1a97c89 | 2022-11-08 13:50:06 +0100 | [diff] [blame] | 20 | }; |
Jan Samek | edda0f9 | 2023-04-27 10:39:27 +0200 | [diff] [blame] | 21 | |
| 22 | #endif /* __DRIVERS_NET_PHY_M88E1512_CHIP_H__ */ |