| Tim Wawrzynczak | 103bd5e | 2020-05-29 13:11:00 -0600 | [diff] [blame] | 1 | config DRIVERS_INTEL_DPTF |
| Tim Wawrzynczak | 0aabd07 | 2020-07-24 13:37:33 -0600 | [diff] [blame] | 2 | bool |
| Tim Wawrzynczak | 103bd5e | 2020-05-29 13:11:00 -0600 | [diff] [blame] | 3 | depends on HAVE_ACPI_TABLES |
| 4 | default n |
| 5 | help |
| 6 | When enabled, entries in the devicetree are used to generate |
| 7 | Intel DPTF Tables at runtime in the SSDT. |
| Sumeet Pawnikar | a91d931 | 2021-08-30 23:19:38 +0530 | [diff] [blame] | 8 | |
| Subrata Banik | dd4acf6 | 2022-12-19 18:19:00 +0530 | [diff] [blame] | 9 | config HAVE_DPTF_EISA_HID |
| 10 | bool |
| 11 | |
| 12 | config DPTF_USE_EISA_HID |
| 13 | bool |
| 14 | depends on DRIVERS_INTEL_DPTF |
| 15 | default y if HAVE_DPTF_EISA_HID |
| 16 | default n |
| 17 | help |
| 18 | Prior to Tiger Lake, all DPTF devices used 7-character EISA |
| 19 | IDs. If selected, the 7-character _HIDs will be emitted, |
| 20 | otherwise, it will use the "new" style, which are regular |
| 21 | 8-character _HIDs. |
| 22 | |
| Sumeet Pawnikar | a91d931 | 2021-08-30 23:19:38 +0530 | [diff] [blame] | 23 | config DRIVERS_INTEL_DPTF_SUPPORTS_TPCH |
| 24 | def_bool n |
| 25 | depends on HAVE_ACPI_TABLES && PMC_IPC_ACPI_INTERFACE |
| 26 | help |
| 27 | When enabled, chip driver/intel/dptf will publish information to the |
| 28 | SSDT for the TPCH device. |
| Varshit B Pandya | e7d3a1a | 2022-03-20 20:39:51 +0530 | [diff] [blame] | 29 | |
| 30 | config DRIVERS_INTEL_DPTF_SUPPORTS_TPWR |
| 31 | def_bool n |
| 32 | depends on DRIVERS_INTEL_DPTF |
| 33 | help |
| 34 | When enabled, chip driver/intel/dptf will publish information to the |
| 35 | SSDT for TPWR device. |
| Varshit B Pandya | 170a76c | 2022-04-02 15:11:36 +0530 | [diff] [blame] | 36 | |
| 37 | config DRIVERS_INTEL_DPTF_SUPPORTS_TBAT |
| 38 | def_bool n |
| 39 | depends on DRIVERS_INTEL_DPTF |
| 40 | help |
| 41 | When enabled, chip driver/intel/dptf will publish information to the |
| 42 | SSDT for TBAT device. |