blob: 140535d8a1a1f75f227a7fdc47caf964a02be6a8 [file] [log] [blame]
Ben Chuang026e9402020-07-16 11:34:36 +08001/* SPDX-License-Identifier: GPL-2.0-only */
2
3/* Driver for Genesys Logic GL9763E */
4
5#include <console/console.h>
6#include <device/device.h>
7#include <device/path.h>
8#include <device/pci.h>
9#include <device/pci_ops.h>
10#include <device/pci_ids.h>
11#include "gl9763e.h"
12
13static void gl9763e_init(struct device *dev)
14{
Renius Chen43dec1a2020-12-28 10:31:34 +080015 uint32_t ver;
16
Ben Chuang026e9402020-07-16 11:34:36 +080017 printk(BIOS_INFO, "GL9763E: init\n");
18 pci_dev_init(dev);
19
20 /* Set VHS (Vendor Header Space) to be writable */
21 pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_W);
22 /* Set single AXI request */
23 pci_or_config32(dev, SCR, SCR_AXI_REQ);
24 /* Disable L0s support */
25 pci_and_config32(dev, CFG_REG_2, ~CFG_REG_2_L0S);
Ben Chuang15854c92022-03-18 15:56:31 +080026
27 if (CONFIG(DRIVERS_GENESYSLOGIC_GL9763E_L1_MAX))
28 /* Set L1 entry delay to MAX */
29 pci_or_config32(dev, CFG_REG_2, CFG_REG_2_L1DLY_MAX);
30
Ben Chuang026e9402020-07-16 11:34:36 +080031 /* Set SSC to 30000 ppm */
32 pci_update_config32(dev, PLL_CTL_2, ~PLL_CTL_2_MAX_SSC_MASK, MAX_SSC_30000PPM);
33 /* Enable SSC */
34 pci_or_config32(dev, PLL_CTL, PLL_CTL_SSC);
Renius Chen43dec1a2020-12-28 10:31:34 +080035 /* Check chip version */
36 ver = pci_read_config32(dev, HW_VER_2);
37 if ((ver & HW_VER_MASK) == REVISION_03) {
38 /* Set clock source for RX path */
39 pci_update_config32(dev, SD_CLKRX_DLY, ~CLK_SRC_MASK, AFTER_OUTPUT_BUFF);
40 }
Ben Chuang1b7f63f2021-01-04 15:39:28 +080041 /* Modify DS delay */
42 pci_update_config32(dev, SD_CLKRX_DLY, ~HS400_RX_DELAY_MASK, HS400_RX_DELAY);
43 /* Disable Slow mode */
44 pci_and_config32(dev, EMMC_CTL, ~SLOW_MODE);
Ben Chuang026e9402020-07-16 11:34:36 +080045 /* Set VHS to read-only */
46 pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_R);
47}
48
49static struct device_operations gl9763e_ops = {
50 .read_resources = pci_dev_read_resources,
51 .set_resources = pci_dev_set_resources,
52 .enable_resources = pci_dev_enable_resources,
53 .ops_pci = &pci_dev_ops_pci,
54 .init = gl9763e_init,
55};
56
57static const unsigned short pci_device_ids[] = {
Felix Singer43b7f412022-03-07 04:34:52 +010058 PCI_DID_GLI_9763E,
Ben Chuang026e9402020-07-16 11:34:36 +080059 0
60};
61
62static const struct pci_driver genesyslogic_gl9763e __pci_driver = {
63 .ops = &gl9763e_ops,
Felix Singer43b7f412022-03-07 04:34:52 +010064 .vendor = PCI_VID_GLI,
Ben Chuang026e9402020-07-16 11:34:36 +080065 .devices = pci_device_ids,
66};
67
68struct chip_operations drivers_generic_genesyslogic_ops = {
Nicholas Sudsgaardbfb11be2024-01-30 09:53:46 +090069 .name = "Genesys Logic GL9763E",
Ben Chuang026e9402020-07-16 11:34:36 +080070};