Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Subrata Banik | 208587e | 2017-05-19 18:38:24 +0530 | [diff] [blame] | 2 | |
Pratik Prajapati | 7384145 | 2017-08-28 15:11:49 -0700 | [diff] [blame] | 3 | #include <cpu/cpu.h> |
| 4 | #include <console/console.h> |
Subrata Banik | 208587e | 2017-05-19 18:38:24 +0530 | [diff] [blame] | 5 | #include <device/device.h> |
Werner Zeh | cfa435a | 2018-12-14 15:14:10 +0100 | [diff] [blame] | 6 | #include <device/pci_ops.h> |
Pratik Prajapati | 7384145 | 2017-08-28 15:11:49 -0700 | [diff] [blame] | 7 | #include <fsp/util.h> |
Subrata Banik | 208587e | 2017-05-19 18:38:24 +0530 | [diff] [blame] | 8 | #include <intelblocks/systemagent.h> |
| 9 | #include <soc/iomap.h> |
| 10 | #include <soc/systemagent.h> |
| 11 | |
| 12 | /* |
| 13 | * SoC implementation |
| 14 | * |
Jonathan Neuschäfer | 5268b76 | 2018-02-12 12:24:25 +0100 | [diff] [blame] | 15 | * Add all known fixed memory ranges for Host Controller/Memory |
Subrata Banik | 208587e | 2017-05-19 18:38:24 +0530 | [diff] [blame] | 16 | * controller. |
| 17 | */ |
| 18 | void soc_add_fixed_mmio_resources(struct device *dev, int *index) |
| 19 | { |
| 20 | static const struct sa_mmio_descriptor soc_fixed_resources[] = { |
| 21 | { PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_SA_PCIEX_LENGTH, |
| 22 | "PCIEXBAR" }, |
| 23 | { MCHBAR, MCH_BASE_ADDRESS, MCH_BASE_SIZE, "MCHBAR" }, |
| 24 | }; |
| 25 | |
| 26 | sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources, |
| 27 | ARRAY_SIZE(soc_fixed_resources)); |
Werner Zeh | cfa435a | 2018-12-14 15:14:10 +0100 | [diff] [blame] | 28 | |
| 29 | /* Add VTd resources if VTd is enabled. These resources were |
| 30 | set up by the FSP-S call. */ |
| 31 | if ((pci_read_config32(dev, CAPID0_A) & VTD_DISABLE)) |
| 32 | return; |
| 33 | |
| 34 | if (MCHBAR32(GFXVTBAR) & VTBAR_ENABLED) { |
| 35 | mmio_resource(dev, *index, |
| 36 | (MCHBAR64(GFXVTBAR) & VTBAR_MASK) / KiB, |
| 37 | VTBAR_SIZE / KiB); |
| 38 | (*index)++; |
| 39 | } |
| 40 | if (MCHBAR32(DEFVTBAR) & VTBAR_ENABLED) { |
| 41 | mmio_resource(dev, *index, |
| 42 | (MCHBAR64(DEFVTBAR) & VTBAR_MASK) / KiB, |
| 43 | VTBAR_SIZE / KiB); |
| 44 | (*index)++; |
| 45 | } |
Subrata Banik | 208587e | 2017-05-19 18:38:24 +0530 | [diff] [blame] | 46 | } |
Pratik Prajapati | 7384145 | 2017-08-28 15:11:49 -0700 | [diff] [blame] | 47 | |
| 48 | int soc_get_uncore_prmmr_base_and_mask(uint64_t *prmrr_base, |
| 49 | uint64_t *prmrr_mask) |
| 50 | { |
| 51 | const void *hob; |
| 52 | size_t hob_size, prmrr_size; |
| 53 | uint64_t phys_address_mask; |
| 54 | const uint8_t prmrr_phys_base_guid[16] = { |
| 55 | 0x38, 0x3a, 0x81, 0x9f, 0xb0, 0x6f, 0xa7, 0x4f, |
| 56 | 0xaf, 0x79, 0x8a, 0x4e, 0x74, 0xdd, 0x48, 0x33 |
| 57 | }; |
| 58 | const uint8_t prmrr_size_guid[16] = { |
| 59 | 0x44, 0xed, 0x0b, 0x99, 0x4e, 0x9b, 0x26, 0x42, |
| 60 | 0xa5, 0x97, 0x28, 0x36, 0x76, 0x6b, 0x5c, 0x41 |
| 61 | }; |
| 62 | |
| 63 | hob = fsp_find_extension_hob_by_guid(prmrr_phys_base_guid, |
| 64 | &hob_size); |
| 65 | if (!hob) { |
| 66 | printk(BIOS_ERR, "Failed to locate PRMRR base hob\n"); |
| 67 | return -1; |
| 68 | } |
| 69 | if (hob_size != sizeof(uint64_t)) { |
| 70 | printk(BIOS_ERR, "Incorrect PRMRR base hob size\n"); |
| 71 | return -1; |
| 72 | } |
| 73 | *prmrr_base = *(uint64_t *) hob; |
| 74 | |
| 75 | hob = fsp_find_extension_hob_by_guid(prmrr_size_guid, |
| 76 | &hob_size); |
| 77 | if (!hob) { |
| 78 | printk(BIOS_ERR, "Failed to locate PRMRR size hob\n"); |
| 79 | return -1; |
| 80 | } |
| 81 | if (hob_size != sizeof(uint64_t)) { |
| 82 | printk(BIOS_ERR, "Incorrect PRMRR base hob size\n"); |
| 83 | return -1; |
| 84 | } |
| 85 | prmrr_size = *(uint64_t *) hob; |
| 86 | phys_address_mask = (1ULL << cpu_phys_address_size()) - 1; |
| 87 | *prmrr_mask = phys_address_mask & ~(uint64_t)(prmrr_size - 1); |
| 88 | |
| 89 | return 0; |
| 90 | } |