| Steve Goodrich | bf0988b | 2013-07-10 11:59:11 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Sage Electronic Engineering, LLC |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | /* PCI IRQ mapping registers, C00h-C01h. */ |
| 21 | OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002) |
| 22 | Field(PRQM, ByteAcc, NoLock, Preserve) { |
| 23 | PRQI, 0x00000008, |
| 24 | PRQD, 0x00000008, /* Offset: 1h */ |
| 25 | } |
| 26 | IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) { |
| 27 | PIRA, 0x00000008, /* Index 0 */ |
| 28 | PIRB, 0x00000008, /* Index 1 */ |
| 29 | PIRC, 0x00000008, /* Index 2 */ |
| 30 | PIRD, 0x00000008, /* Index 3 */ |
| 31 | PIRE, 0x00000008, /* Index 4 */ |
| 32 | PIRF, 0x00000008, /* Index 5 */ |
| 33 | PIRG, 0x00000008, /* Index 6 */ |
| 34 | PIRH, 0x00000008, /* Index 7 */ |
| 35 | } |
| 36 | |
| 37 | /* PCI Error control register */ |
| 38 | OperationRegion(PERC, SystemIO, 0x00000C14, 0x00000001) |
| 39 | Field(PERC, ByteAcc, NoLock, Preserve) { |
| 40 | SENS, 0x00000001, |
| 41 | PENS, 0x00000001, |
| 42 | SENE, 0x00000001, |
| 43 | PENE, 0x00000001, |
| 44 | } |
| 45 | |
| 46 | /* Client Management index/data registers */ |
| 47 | OperationRegion(CMT, SystemIO, 0x00000C50, 0x00000002) |
| 48 | Field(CMT, ByteAcc, NoLock, Preserve) { |
| 49 | CMTI, 8, |
| 50 | /* Client Management Data register */ |
| 51 | G64E, 1, |
| 52 | G64O, 1, |
| 53 | G32O, 2, |
| 54 | , 2, |
| 55 | GPSL, 2, |
| 56 | } |
| 57 | |
| 58 | /* GPM Port register */ |
| 59 | OperationRegion(GPT, SystemIO, 0x00000C52, 0x00000001) |
| 60 | Field(GPT, ByteAcc, NoLock, Preserve) { |
| 61 | GPB0,1, |
| 62 | GPB1,1, |
| 63 | GPB2,1, |
| 64 | GPB3,1, |
| 65 | GPB4,1, |
| 66 | GPB5,1, |
| 67 | GPB6,1, |
| 68 | GPB7,1, |
| 69 | } |
| 70 | |
| 71 | /* Flash ROM program enable register */ |
| 72 | OperationRegion(FRE, SystemIO, 0x00000C6F, 0x00000001) |
| 73 | Field(FRE, ByteAcc, NoLock, Preserve) { |
| 74 | , 0x00000006, |
| 75 | FLRE, 0x00000001, |
| 76 | } |
| 77 | |
| 78 | /* PM2 index/data registers */ |
| 79 | OperationRegion(PM2R, SystemIO, 0x00000CD0, 0x00000002) |
| 80 | Field(PM2R, ByteAcc, NoLock, Preserve) { |
| 81 | PM2I, 0x00000008, |
| 82 | PM2D, 0x00000008, |
| 83 | } |
| 84 | |
| 85 | /* Power Management I/O registers, TODO:PMIO is quite different in SB800. */ |
| 86 | OperationRegion(PIOR, SystemIO, 0x00000CD6, 0x00000002) |
| 87 | Field(PIOR, ByteAcc, NoLock, Preserve) { |
| 88 | PIOI, 0x00000008, |
| 89 | PIOD, 0x00000008, |
| 90 | } |
| 91 | |
| 92 | IndexField (PIOI, PIOD, ByteAcc, NoLock, Preserve) { |
| 93 | Offset(0xEE), |
| 94 | UPWS, 3, |
| 95 | } |