Elyes HAOUAS | f50b662 | 2020-07-19 14:00:43 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 4 | #include <baseboard/variants.h> |
| 5 | #include <device/device.h> |
Tim Wawrzynczak | 6b8599f | 2022-02-14 16:04:21 -0700 | [diff] [blame] | 6 | #include <drivers/tpm/cr50.h> |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 7 | #include <ec/ec.h> |
Tim Wawrzynczak | 1d84941 | 2020-08-25 16:50:29 -0600 | [diff] [blame] | 8 | #include <fw_config.h> |
Duncan Laurie | 98a9f1f | 2020-11-05 10:06:17 -0800 | [diff] [blame] | 9 | #include <gpio.h> |
| 10 | #include <intelblocks/gpio.h> |
Jes Klinke | 7f844ab | 2020-08-28 13:44:21 -0700 | [diff] [blame] | 11 | #include <security/tpm/tss.h> |
Tim Wawrzynczak | eb6ebc0 | 2021-03-22 16:39:57 -0600 | [diff] [blame] | 12 | #include <intelblocks/tcss.h> |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 13 | #include <soc/pci_devs.h> |
Jes Klinke | 7f844ab | 2020-08-28 13:44:21 -0700 | [diff] [blame] | 14 | #include <soc/ramstage.h> |
Elyes Haouas | bdd03c2 | 2024-05-27 11:20:07 +0200 | [diff] [blame^] | 15 | #include <stdio.h> |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 16 | #include <variant/gpio.h> |
John Zhao | 623da4b | 2020-09-08 09:44:44 -0700 | [diff] [blame] | 17 | #include <vb2_api.h> |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 18 | |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 19 | #include "drivers/intel/pmc_mux/conn/chip.h" |
| 20 | |
Furquan Shaikh | 522174b | 2021-09-16 16:54:04 -0700 | [diff] [blame] | 21 | WEAK_DEV_PTR(conn1); |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 22 | |
| 23 | static void typec_orientation_fixup(void) |
| 24 | { |
Furquan Shaikh | 522174b | 2021-09-16 16:54:04 -0700 | [diff] [blame] | 25 | const struct device *conn = DEV_PTR(conn1); |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 26 | |
Furquan Shaikh | 522174b | 2021-09-16 16:54:04 -0700 | [diff] [blame] | 27 | if (!is_dev_enabled(conn)) |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 28 | return; |
| 29 | |
Jes Klinke | 6e929ac | 2020-12-01 15:21:38 -0800 | [diff] [blame] | 30 | if (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) |
| 31 | || fw_config_probe(FW_CONFIG(DB_USB, USB3_ACTIVE)) |
| 32 | || fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)) |
| 33 | || fw_config_probe(FW_CONFIG(DB_USB, USB3_NO_A))) { |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 34 | struct drivers_intel_pmc_mux_conn_config *config = conn->chip_info; |
| 35 | |
| 36 | if (config) { |
Jes Klinke | 6e929ac | 2020-12-01 15:21:38 -0800 | [diff] [blame] | 37 | printk(BIOS_INFO, |
| 38 | "Configure Right Type-C port orientation for retimer\n"); |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 39 | config->sbu_orientation = TYPEC_ORIENTATION_NORMAL; |
| 40 | } |
| 41 | } |
| 42 | } |
| 43 | |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 44 | static void mainboard_init(struct device *dev) |
| 45 | { |
| 46 | mainboard_ec_init(); |
Tim Wawrzynczak | eafe798 | 2020-09-30 13:59:21 -0600 | [diff] [blame] | 47 | typec_orientation_fixup(); |
Jes Klinke | 6e929ac | 2020-12-01 15:21:38 -0800 | [diff] [blame] | 48 | variant_devtree_update(); |
| 49 | } |
| 50 | |
| 51 | void __weak variant_devtree_update(void) |
| 52 | { |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 53 | } |
| 54 | |
Nick Vaccaro | 3865a33 | 2021-02-16 18:58:43 -0800 | [diff] [blame] | 55 | void __weak variant_ramstage_init(void) |
| 56 | { |
| 57 | /* Default weak implementation */ |
| 58 | } |
| 59 | |
Tim Wawrzynczak | 1d84941 | 2020-08-25 16:50:29 -0600 | [diff] [blame] | 60 | static void add_fw_config_oem_string(const struct fw_config *config, void *arg) |
| 61 | { |
| 62 | struct smbios_type11 *t; |
| 63 | char buffer[64]; |
| 64 | |
| 65 | t = (struct smbios_type11 *)arg; |
| 66 | |
| 67 | snprintf(buffer, sizeof(buffer), "%s-%s", config->field_name, config->option_name); |
| 68 | t->count = smbios_add_string(t->eos, buffer); |
| 69 | } |
| 70 | |
| 71 | static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t) |
| 72 | { |
| 73 | fw_config_for_each_found(add_fw_config_oem_string, t); |
| 74 | } |
| 75 | |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 76 | static void mainboard_enable(struct device *dev) |
| 77 | { |
| 78 | dev->ops->init = mainboard_init; |
Tim Wawrzynczak | 1d84941 | 2020-08-25 16:50:29 -0600 | [diff] [blame] | 79 | dev->ops->get_smbios_strings = mainboard_smbios_strings; |
Nick Vaccaro | 3865a33 | 2021-02-16 18:58:43 -0800 | [diff] [blame] | 80 | |
| 81 | variant_ramstage_init(); |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 82 | } |
| 83 | |
Jes Klinke | 7f844ab | 2020-08-28 13:44:21 -0700 | [diff] [blame] | 84 | void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *cfg) |
| 85 | { |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 86 | tpm_result_t rc; |
Jes B. Klinke | c6b041a1 | 2022-04-19 14:00:33 -0700 | [diff] [blame] | 87 | if (!CONFIG(TPM_GOOGLE_CR50) || !CONFIG(SPI_TPM)) { |
Jes Klinke | e94f865 | 2020-10-30 13:46:39 -0700 | [diff] [blame] | 88 | /* |
| 89 | * Negotiation of long interrupt pulses is only supported via SPI. I2C is only |
| 90 | * used on reworked prototypes on which the TPM is replaced with Dauntless under |
| 91 | * development, it will use long pulses by default, or use the interrupt line in |
| 92 | * a different way altogether. |
| 93 | */ |
| 94 | return; |
| 95 | } |
| 96 | |
Jon Murphy | 2460481 | 2023-09-05 10:37:05 -0600 | [diff] [blame] | 97 | rc = tlcl_lib_init(); |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 98 | if (rc != TPM_SUCCESS) { |
Jon Murphy | 53fc667 | 2023-09-26 21:05:37 -0600 | [diff] [blame] | 99 | printk(BIOS_ERR, "tlcl_lib_init() failed: %#x\n", rc); |
John Zhao | 623da4b | 2020-09-08 09:44:44 -0700 | [diff] [blame] | 100 | return; |
| 101 | } |
| 102 | |
Jes Klinke | e94f865 | 2020-10-30 13:46:39 -0700 | [diff] [blame] | 103 | if (cr50_is_long_interrupt_pulse_enabled()) { |
Jes Klinke | 7f844ab | 2020-08-28 13:44:21 -0700 | [diff] [blame] | 104 | printk(BIOS_INFO, "Enabling S0i3.4\n"); |
| 105 | } else { |
| 106 | /* |
| 107 | * Disable S0i3.4, preventing the GPIO block from switching to |
| 108 | * slow clock. |
| 109 | */ |
| 110 | printk(BIOS_INFO, "Not enabling S0i3.4\n"); |
| 111 | cfg->LpmStateDisableMask |= LPM_S0i3_4; |
| 112 | cfg->gpio_override_pm = 1; |
| 113 | memset(cfg->gpio_pm, 0, sizeof(cfg->gpio_pm)); |
| 114 | } |
| 115 | } |
| 116 | |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 117 | static void mainboard_chip_init(void *chip_info) |
| 118 | { |
| 119 | const struct pad_config *base_pads; |
| 120 | const struct pad_config *override_pads; |
| 121 | size_t base_num, override_num; |
| 122 | |
Matt DeVillier | 6b8728f | 2022-09-23 13:34:22 -0500 | [diff] [blame] | 123 | base_pads = baseboard_gpio_table(&base_num); |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 124 | override_pads = variant_override_gpio_table(&override_num); |
| 125 | |
Jes Klinke | 5c7311a | 2020-10-30 13:23:14 -0700 | [diff] [blame] | 126 | gpio_configure_pads_with_override(base_pads, base_num, override_pads, override_num); |
Duncan Laurie | 98a9f1f | 2020-11-05 10:06:17 -0800 | [diff] [blame] | 127 | |
| 128 | /* |
| 129 | * Check SATAXPCIE1 (GPP_A12) RX status to determine if SSD is NVMe or SATA and set |
| 130 | * the IOSSTATE RX field to drive 0 or 1 back to the internal controller to ensure |
| 131 | * the attached device is not mis-detected on resume from S0ix. |
| 132 | */ |
| 133 | if (gpio_get(GPP_A12)) { |
| 134 | const struct pad_config gpio_pedet_nvme[] = { |
| 135 | PAD_CFG_NF_IOSSTATE(GPP_A12, NONE, DEEP, NF1, HIZCRx1), |
| 136 | }; |
| 137 | gpio_configure_pads(gpio_pedet_nvme, ARRAY_SIZE(gpio_pedet_nvme)); |
| 138 | printk(BIOS_INFO, "SATAXPCIE1 indicates PCIe NVMe is present\n"); |
| 139 | } else { |
| 140 | const struct pad_config gpio_pedet_sata[] = { |
| 141 | PAD_CFG_NF_IOSSTATE(GPP_A12, NONE, DEEP, NF1, HIZCRx0), |
| 142 | }; |
| 143 | gpio_configure_pads(gpio_pedet_sata, ARRAY_SIZE(gpio_pedet_sata)); |
| 144 | printk(BIOS_INFO, "SATAXPCIE1 indicates SATA SSD is present\n"); |
| 145 | } |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 146 | } |
| 147 | |
Nick Vaccaro | f978191 | 2020-01-28 18:43:28 -0800 | [diff] [blame] | 148 | struct chip_operations mainboard_ops = { |
| 149 | .init = mainboard_chip_init, |
| 150 | .enable_dev = mainboard_enable, |
| 151 | }; |