Xi Chen | 022b1b9 | 2021-02-05 11:45:12 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
| 2 | |
| 3 | #ifndef X_HAL_IO_H |
| 4 | #define X_HAL_IO_H |
| 5 | |
| 6 | #include "dramc_pi_api.h" |
| 7 | //=========================================================================== |
| 8 | #define REG_ACCESS_NAO_DGB 0 |
| 9 | #define REG_ACCESS_PORTING_DGB 0 |
| 10 | #define REG_SHUFFLE_REG_CHECK 0 |
| 11 | |
| 12 | // field access macro----------------------------------------------------------- |
| 13 | |
| 14 | /* field macros */ |
| 15 | #define Fld(wid, shft) (((U32)wid << 16) | (shft << 8)) |
| 16 | #define Fld_wid(fld) ((UINT8)((fld) >> 16)) |
| 17 | #define Fld_shft(fld) ((UINT8)((fld) >> 8)) |
| 18 | #define Fld_ac(fld) (UINT8)(fld) |
| 19 | |
| 20 | /* access method*/ |
| 21 | #define AC_FULLB0 1 |
| 22 | #define AC_FULLB1 2 |
| 23 | #define AC_FULLB2 3 |
| 24 | #define AC_FULLB3 4 |
| 25 | #define AC_FULLW10 5 |
| 26 | #define AC_FULLW21 6 |
| 27 | #define AC_FULLW32 7 |
| 28 | #define AC_FULLDW 8 |
| 29 | #define AC_MSKB0 11 |
| 30 | #define AC_MSKB1 12 |
| 31 | #define AC_MSKB2 13 |
| 32 | #define AC_MSKB3 14 |
| 33 | #define AC_MSKW10 15 |
| 34 | #define AC_MSKW21 16 |
| 35 | #define AC_MSKW32 17 |
| 36 | #define AC_MSKDW 18 |
| 37 | |
| 38 | #define Fld2Msk32(fld) /*lint -save -e504 */ (((U32)0xffffffff>>(32-Fld_wid(fld)))<<Fld_shft(fld)) /*lint -restore */ |
| 39 | #define P_Fld(val, fld) ( upk > 0 ? Fld2Msk32(fld): (((UINT32)(val) & ((1 << Fld_wid(fld)) - 1)) << Fld_shft(fld))) |
| 40 | |
| 41 | extern U32 u4Dram_Register_Read(DRAMC_CTX_T *p, U32 u4reg_addr); |
| 42 | extern void ucDram_Register_Write(DRAMC_CTX_T *p, U32 u4reg_addr, U32 u4reg_value); |
| 43 | |
| 44 | extern void vIO32Write4BMsk2(DRAMC_CTX_T *p, U32 reg32, U32 val32, U32 msk32); |
| 45 | extern void vIO32Write4BMsk_All2(DRAMC_CTX_T *p, U32 reg32, U32 val32, U32 msk32); |
| 46 | extern void vIO32Write4B_All2(DRAMC_CTX_T *p, U32 reg32, U32 val32); |
| 47 | |
| 48 | // ========================= |
| 49 | // public Macro for general use. |
| 50 | //========================== |
| 51 | #define u4IO32Read4B(reg32) u4Dram_Register_Read(p, reg32) |
| 52 | #define vIO32Write4B(reg32, val32) ucDram_Register_Write(p, reg32, val32) |
| 53 | #define vIO32Write4B_All(reg32, val32) vIO32Write4B_All2(p, reg32, val32) |
| 54 | #define vIO32Write4BMsk(reg32, val32, msk32) vIO32Write4BMsk2(p, reg32, val32, msk32) |
| 55 | #define vIO32Write4BMsk_All(reg32, val32, msk32) vIO32Write4BMsk_All2(p, reg32, val32, msk32) |
| 56 | |
| 57 | #define u4IO32ReadFldAlign(reg32, fld) /*lint -save -e506 -e504 -e514 -e62 -e737 -e572 -e961 -e648 -e701 -e732 -e571 */ \ |
| 58 | ((u4IO32Read4B(reg32) & Fld2Msk32(fld)) >> Fld_shft(fld)) |
| 59 | |
| 60 | #define vIO32WriteFldAlign(reg32, val, fld) /*lint -save -e506 -e504 -e514 -e62 -e737 -e572 -e961 -e648 -e701 -e732 -e571 */ \ |
| 61 | (vIO32Write4BMsk((reg32), ((U32)(val) << Fld_shft(fld)), Fld2Msk32(fld))) |
| 62 | |
| 63 | #define vIO32WriteFldMulti(reg32, list) /*lint -save -e506 -e504 -e514 -e62 -e737 -e572 -e961 -e648 -e701 -e732 -e571 */ \ |
| 64 | { \ |
| 65 | UINT16 upk = 1; \ |
| 66 | INT32 msk = (INT32)(list); \ |
| 67 | { upk = 0; \ |
Arthur Heymans | bd42906 | 2023-04-18 19:53:22 +0200 | [diff] [blame^] | 68 | (void)upk; \ |
Xi Chen | 022b1b9 | 2021-02-05 11:45:12 +0800 | [diff] [blame] | 69 | ((U32)msk == 0xffffffff)? (vIO32Write4B(reg32, (list))): (((U32)msk)? vIO32Write4BMsk(reg32, (list), ((U32)msk)):(U32)0); \ |
| 70 | } \ |
| 71 | }/*lint -restore */ |
| 72 | |
| 73 | //========================= |
| 74 | // Public Macro for write all-dramC or all-PHY registers |
| 75 | //========================= |
| 76 | #define vIO32WriteFldAlign_All(reg32, val, fld) /*lint -save -e506 -e504 -e514 -e62 -e737 -e572 -e961 -e648 -e701 -e732 -e571 */ \ |
| 77 | (vIO32Write4BMsk_All((reg32), ((U32)(val) << Fld_shft(fld)), Fld2Msk32(fld))) |
| 78 | |
| 79 | #define vIO32WriteFldMulti_All(reg32, list) /*lint -save -e506 -e504 -e514 -e62 -e737 -e572 -e961 -e648 -e701 -e732 -e571 */ \ |
| 80 | { \ |
| 81 | UINT16 upk = 1; \ |
| 82 | INT32 msk = (INT32)(list); \ |
| 83 | { upk = 0; \ |
Arthur Heymans | bd42906 | 2023-04-18 19:53:22 +0200 | [diff] [blame^] | 84 | (void)upk; \ |
Xi Chen | 022b1b9 | 2021-02-05 11:45:12 +0800 | [diff] [blame] | 85 | ((U32)msk == 0xffffffff)? (vIO32Write4B_All(reg32, (list))): (((U32)msk)? vIO32Write4BMsk_All(reg32, (list), ((U32)msk)): (void)0); \ |
| 86 | } \ |
| 87 | }/*lint -restore */ |
| 88 | |
| 89 | #ifdef __MD32__ |
| 90 | #include "x_hal_io_dpm.h" |
| 91 | #endif |
| 92 | |
| 93 | #endif // X_HAL_IO_H |