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review.coreboot.org / coreboot / bd2c2520949aa53ea1323f22be5a3d9d9e05179c / . / src / mainboard / google / rex / variants / baseboard / ovis / devicetree.cb
blob: 6fc0dc029a8a7d784484dec41d2428e7bd04b468 [file] [log] [blame]
Jakub Czapigad95d2642023-05-30 08:57:17 +0000[diff] [blame]1chip soc/intel/meteorlake
2
3 # GPE configuration
Stefan Reinauera9b08f22023-08-01 12:29:02 -0700[diff] [blame]4 register "pmc_gpe0_dw0" = "GPP_D"
Jakub Czapigad95d2642023-05-30 08:57:17 +0000[diff] [blame]5 register "pmc_gpe0_dw1" = "GPP_E"
6 register "pmc_gpe0_dw2" = "GPP_F"
7
8 # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
9 register "gen1_dec" = "0x00fc0801"
10 register "gen2_dec" = "0x000c0201"
11 # EC memory map range is 0x900-0x9ff
12 register "gen3_dec" = "0x00fc0901"
13
14 register "usb2_ports[0]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 0
15 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 1
16 register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 2
17 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 3
18 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 4
19 register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 5
20 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 6
21 register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 7
22 register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 8
23 register "usb2_ports[9]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 9
24
25 register "usb3_ports[0]" = "USB3_PORT_EMPTY" # Disable USB3.0 Port 0
26 register "usb3_ports[1]" = "USB3_PORT_EMPTY" # Disable USB3.0 Port 1
27
28 register "tcss_ports[0]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 0
29 register "tcss_ports[1]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 1
30 register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 2
31 register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
32
33 # S0ix enable
34 register "s0ix_enable" = "1"
35
Sukumar Ghoraibd2c2522023-07-31 03:24:44 -0700[diff] [blame^]36 # Disable C1 C-state auto-demotion
37 register "disable_c1_state_auto_demotion" = "1"
38
Sukumar Ghorai211e3912023-07-06 15:23:32 -0700[diff] [blame]39 # Enable Energy Reporting
40 register "pch_pm_energy_report_enable" = "1"
41
Jakub Czapigad95d2642023-05-30 08:57:17 +0000[diff] [blame]42 # DPTF enable
43 register "dptf_enable" = "1"
44
Subrata Banik35ef2e52023-07-04 08:44:23 +0530[diff] [blame]45 # Temporary setting TCC of 100C = Tj max (110) - TCC_Offset (10)
46 register "tcc_offset" = "10"
47
Jakub Czapigad95d2642023-05-30 08:57:17 +0000[diff] [blame]48 # Enable CNVi BT
49 register "cnvi_bt_core" = "true"
50
Subrata Banik854de982023-06-27 17:56:14 -0700[diff] [blame]51 register "sagv" = "SAGV_ENABLED"
52
53 register "sagv_freq_mhz" = "{
54 [0] = 3200,
55 [1] = 6000,
56 [2] = 6400,
57 [3] = 5600,
58 }"
59
60 register "sagv_gear" = "{
61 [0] = 4,
62 [1] = 4,
63 [2] = 4,
64 [3] = 2,
65 }"
66
Jakub Czapigad95d2642023-05-30 08:57:17 +0000[diff] [blame]67 # Set on-board graphics as primary display
68 register "skip_ext_gfx_scan" = "1"
69
70 register "serial_io_uart_mode" = "{
71 [PchSerialIoIndexUART0] = PchSerialIoPci,
72 [PchSerialIoIndexUART1] = PchSerialIoDisabled,
73 [PchSerialIoIndexUART2] = PchSerialIoDisabled,
74 }"
75
76 register "pch_hda_dsp_enable" = "1"
77 register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
78 register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
79 register "pch_hda_idisp_codec_enable" = "1"
80
81 device domain 0 on
82 device ref igpu on end
83 device ref dtt on end
Jakub Czapigaddbe8322023-06-27 16:19:34 +0000[diff] [blame]84 device ref ioe_shared_sram on end
Jakub Czapigad95d2642023-05-30 08:57:17 +0000[diff] [blame]85 device ref xhci on end
Pratikkumar Prajapatibb4bc772023-06-21 18:34:40 -0700[diff] [blame]86 device ref pmc_shared_sram on end
Jakub Czapigad95d2642023-05-30 08:57:17 +0000[diff] [blame]87 device ref heci1 on end
88 device ref uart0 on end
89 device ref soc_espi on
90 chip ec/google/chromeec
91 device pnp 0c09.0 on end
92 end
93 end
94 end
95end