blob: 7f6d7c3d723e858858edbdc44abc9272fef8ce54 [file] [log] [blame]
Aaron Durbineeacf742014-07-10 15:05:13 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20
21#include <arch/io.h>
22#include <stdlib.h>
23#include <console/console.h>
24#include <soc/addressmap.h>
Aaron Durbinf13c5672014-07-11 15:56:31 -050025#include <soc/display.h>
Aaron Durbin5f66b522014-07-14 15:00:41 -050026#include <soc/id.h>
Aaron Durbineeacf742014-07-10 15:05:13 -050027#include "mc.h"
28#include "sdram.h"
29
30/* returns total amount of DRAM (in MB) from memory controller registers */
31int sdram_size_mb(void)
32{
33 struct tegra_mc_regs *mc = (struct tegra_mc_regs *)TEGRA_MC_BASE;
34 static int total_size = 0;
35
36 if (total_size)
37 return total_size;
38
39 /*
40 * This obtains memory size from the External Memory Aperture
41 * Configuration register. Nvidia confirmed that it is safe to assume
42 * this value represents the total physical DRAM size.
43 */
44 total_size = (read32(&mc->emem_cfg) >> MC_EMEM_CFG_SIZE_MB_SHIFT) &
45 MC_EMEM_CFG_SIZE_MB_MASK;
46
47 printk(BIOS_DEBUG, "%s: Total SDRAM (MB): %u\n", __func__, total_size);
48 return total_size;
49}
50
Aaron Durbinf13c5672014-07-11 15:56:31 -050051static void carveout_from_regs(uintptr_t *base_mib, size_t *size_mib,
52 uint32_t bom, uint32_t bom_hi, uint32_t size)
Aaron Durbineeacf742014-07-10 15:05:13 -050053{
Aaron Durbinf13c5672014-07-11 15:56:31 -050054
55 /* All size regs of carveouts are in MiB. */
56 if (size == 0)
57 return;
58
59 *size_mib = size;
60 bom >>= 20;
61 bom |= bom_hi >> (32 - 20);
62
63 *base_mib = bom;
64}
65
66void carveout_range(int id, uintptr_t *base_mib, size_t *size_mib)
67{
68 *base_mib = 0;
69 *size_mib = 0;
70 struct tegra_mc_regs * const mc = (struct tegra_mc_regs *)TEGRA_MC_BASE;
71
72 switch (id) {
73 case CARVEOUT_TZ:
Aaron Durbin5f66b522014-07-14 15:00:41 -050074 /* AVP does not have access to the TZ carveout registers. */
75 if (context_avp())
76 return;
77 carveout_from_regs(base_mib, size_mib,
78 read32(&mc->security_cfg0),
79 0,
80 read32(&mc->security_cfg1));
Aaron Durbinf13c5672014-07-11 15:56:31 -050081 break;
82 case CARVEOUT_SEC:
83 carveout_from_regs(base_mib, size_mib,
84 read32(&mc->sec_carveout_bom),
85 read32(&mc->sec_carveout_adr_hi),
86 read32(&mc->sec_carveout_size_mb));
87 break;
88 case CARVEOUT_MTS:
89 carveout_from_regs(base_mib, size_mib,
90 read32(&mc->mts_carveout_bom),
91 read32(&mc->mts_carveout_adr_hi),
92 read32(&mc->mts_carveout_size_mb));
93 break;
94 case CARVEOUT_VPR:
95 carveout_from_regs(base_mib, size_mib,
96 read32(&mc->video_protect_bom),
97 read32(&mc->video_protect_bom_adr_hi),
98 read32(&mc->video_protect_size_mb));
99 break;
100 default:
101 break;
102 }
103}
104
105void memory_range_by_bits(int bits, uintptr_t *base_mib, uintptr_t *end_mib)
106{
107 uintptr_t base;
108 uintptr_t end;
109 int i;
110
111 base = CONFIG_SYS_SDRAM_BASE / MiB;
112 end = base + sdram_size_mb();
113
114 if (bits == ADDRESS_SPACE_32_BIT)
115 end = MIN(end, 4096);
116
117 for (i = 0; i < CARVEOUT_NUM; i++) {
118 uintptr_t carveout_base;
119 size_t carveout_size;
120
121 carveout_range(i, &carveout_base, &carveout_size);
122
123 if (carveout_size == 0)
124 continue;
125
126 /* Bypass carveouts out of requested range. */
127 if (carveout_base >= end)
128 continue;
129
130 /*
131 * This is crude, but the assumption is that carveouts live
132 * at the upper range of physical memory. Therefore, update
133 * the end address to be equal to the base of the carveout.
134 */
135 end = carveout_base;
136 }
137
138 *base_mib = base;
139 *end_mib = end;
140}
141
142uintptr_t framebuffer_attributes(size_t *size_mib)
143{
144 uintptr_t begin;
145 uintptr_t end;
146
147 /* Place the framebuffer just below the 32-bit addressable limit. */
148 memory_range_by_bits(ADDRESS_SPACE_32_BIT, &begin, &end);
149
Aaron Durbinbc3019c2014-07-15 10:53:29 -0500150 /*
151 * Need to take into account that the Trust Zone region is not able to
152 * be read by the AVP. The Trust Zone region will live just below the
153 * rest of the carveout regions.
154 */
155 if (context_avp())
156 end -= CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB;
157
Aaron Durbinf13c5672014-07-11 15:56:31 -0500158 *size_mib = FB_SIZE_MB;
159 end -= *size_mib;
160
161 return end;
Aaron Durbineeacf742014-07-10 15:05:13 -0500162}