blob: 11bc4593e193bbf168e3cf04acb3b6b0cbfa2a3e [file] [log] [blame]
Angel Ponsf23ae0b2020-04-02 23:48:12 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Gabe Black3c7e9392013-05-26 07:15:57 -07002
3#include <types.h>
4
5#include <arch/cache.h>
Alexander Couzens8c53b752014-10-24 23:52:56 +02006#include <bootblock_common.h>
Sam Lewisb5353962020-08-03 21:14:26 +10007#include <symbols.h>
8
9#define SRAM_START ((uintptr_t)_sram / MiB)
10#define SRAM_END (DIV_ROUND_UP((uintptr_t)_esram, MiB))
11
12#define DRAM_START ((uintptr_t)_dram / MiB)
13#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
Gabe Black3c7e9392013-05-26 07:15:57 -070014
Vadim Bendebury0b341b32014-04-23 11:09:44 -070015void bootblock_soc_init(void)
Gabe Black3c7e9392013-05-26 07:15:57 -070016{
Sam Lewisb5353962020-08-03 21:14:26 +100017 mmu_init();
Gabe Black3c7e9392013-05-26 07:15:57 -070018
Sam Lewisb5353962020-08-03 21:14:26 +100019 /* Map everything strongly ordered by default */
20 mmu_config_range(0, 4096, DCACHE_OFF);
21
22 mmu_config_range(SRAM_START, SRAM_END - SRAM_START,
23 DCACHE_WRITEBACK);
24
25 mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
26
27 dcache_mmu_enable();
Gabe Black3c7e9392013-05-26 07:15:57 -070028}