Angel Pons | a2ee761 | 2020-04-04 18:51:15 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Gabe Black | 14eb43b | 2013-10-07 01:57:42 -0700 | [diff] [blame] | 2 | |
| 3 | #include <soc/addressmap.h> |
Gabe Black | 6541b28 | 2014-03-26 21:43:53 -0700 | [diff] [blame] | 4 | #include <soc/clock.h> |
Gabe Black | 14eb43b | 2013-10-07 01:57:42 -0700 | [diff] [blame] | 5 | #include <soc/nvidia/tegra/i2c.h> |
| 6 | |
Gabe Black | 6541b28 | 2014-03-26 21:43:53 -0700 | [diff] [blame] | 7 | struct tegra_i2c_bus_info tegra_i2c_info[] = { |
| 8 | { |
| 9 | .base = (void *)TEGRA_I2C_BASE, |
| 10 | .reset_bit = CLK_L_I2C1, |
| 11 | .reset_func = &clock_reset_l |
| 12 | }, |
| 13 | { |
| 14 | .base = (void *)TEGRA_I2C2_BASE, |
| 15 | .reset_bit = CLK_H_I2C2, |
| 16 | .reset_func = &clock_reset_h |
| 17 | }, |
| 18 | { |
| 19 | .base = (void *)TEGRA_I2C3_BASE, |
| 20 | .reset_bit = CLK_U_I2C3, |
| 21 | .reset_func = &clock_reset_u |
| 22 | }, |
| 23 | { |
| 24 | .base = (void *)TEGRA_I2C4_BASE, |
| 25 | .reset_bit = CLK_V_I2C4, |
| 26 | .reset_func = &clock_reset_v |
| 27 | }, |
| 28 | { |
| 29 | .base = (void *)TEGRA_I2C5_BASE, |
| 30 | .reset_bit = CLK_H_I2C5, |
| 31 | .reset_func = &clock_reset_h |
| 32 | }, |
| 33 | { |
| 34 | .base = (void *)TEGRA_I2C6_BASE, |
| 35 | .reset_bit = CLK_X_I2C6, |
| 36 | .reset_func = &clock_reset_x |
| 37 | } |
Gabe Black | 14eb43b | 2013-10-07 01:57:42 -0700 | [diff] [blame] | 38 | }; |
Yen Lin | cb6bb3b | 2015-04-03 16:32:26 -0700 | [diff] [blame] | 39 | |
Patrick Georgi | a37eef1 | 2019-12-02 11:42:44 +0100 | [diff] [blame] | 40 | const unsigned int num_i2c_buses = ARRAY_SIZE(tegra_i2c_info); |