Angel Pons | e67ab18 | 2020-04-04 18:51:11 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 2 | |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 3 | #include <device/mmio.h> |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 4 | #include <delay.h> |
| 5 | #include <soc/emi.h> |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 6 | #include <soc/spm.h> |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 7 | #include <soc/dramc_register.h> |
| 8 | #include <soc/dramc_pi_api.h> |
| 9 | |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 10 | u8 get_freq_fsq(u8 freq) |
| 11 | { |
| 12 | if (freq == LP4X_DDR1600 || freq == LP4X_DDR2400) |
| 13 | return FSP_0; |
| 14 | else |
| 15 | return FSP_1; |
| 16 | } |
| 17 | |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 18 | static void dramc_sw_imp_cal_vref_sel(u8 term_option, u8 impcal_stage) |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 19 | { |
| 20 | u8 vref_sel = 0; |
| 21 | |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 22 | if (term_option == ODT_ON) |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 23 | vref_sel = IMP_LP4X_TERM_VREF_SEL; |
| 24 | else { |
| 25 | switch (impcal_stage) { |
| 26 | case IMPCAL_STAGE_DRVP: |
| 27 | vref_sel = IMP_DRVP_LP4X_UNTERM_VREF_SEL; |
| 28 | break; |
| 29 | case IMPCAL_STAGE_DRVN: |
| 30 | vref_sel = IMP_DRVN_LP4X_UNTERM_VREF_SEL; |
| 31 | break; |
| 32 | default: |
| 33 | vref_sel = IMP_TRACK_LP4X_UNTERM_VREF_SEL; |
| 34 | break; |
| 35 | } |
| 36 | } |
| 37 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 38 | clrsetbits32(&ch[0].phy.shu[0].ca_cmd[11], 0x3f << 8, vref_sel << 8); |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 39 | } |
| 40 | |
Yu-Ping Wu | 4d4ccce | 2019-10-03 08:49:23 +0800 | [diff] [blame] | 41 | void dramc_sw_impedance_cal(const struct sdram_params *params, u8 term, |
| 42 | struct dram_impedance *impedance) |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 43 | { |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 44 | u32 broadcast_bak, impcal_bak, imp_cal_result; |
| 45 | u32 DRVP_result = 0xff, ODTN_result = 0xff, DRVN_result = 0x9; |
| 46 | |
| 47 | broadcast_bak = dramc_get_broadcast(); |
| 48 | dramc_set_broadcast(DRAMC_BROADCAST_OFF); |
| 49 | |
Huayang Duan | cac990f | 2020-06-08 17:40:55 +0800 | [diff] [blame] | 50 | for (u8 chn = 0; chn < CHANNEL_MAX; chn++) { |
| 51 | clrbits32(&ch[chn].phy.misc_spm_ctrl1, 0xf << 0); |
| 52 | write32(&ch[chn].phy.misc_spm_ctrl2, 0x0); |
| 53 | write32(&ch[chn].phy.misc_spm_ctrl0, 0x0); |
| 54 | clrbits32(&ch[chn].ao.impcal, 0x1 << 31); |
| 55 | } |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 56 | |
| 57 | impcal_bak = read32(&ch[0].ao.impcal); |
| 58 | dramc_sw_imp_cal_vref_sel(term, IMPCAL_STAGE_DRVP); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 59 | clrbits32(&ch[0].phy.misc_imp_ctrl1, 0x1 << 6); |
| 60 | clrsetbits32(&ch[0].ao.impcal, 0x1 << 21, 0x3 << 24); |
| 61 | clrsetbits32(&ch[0].phy.misc_imp_ctrl0, 0x7 << 4, 0x3 << 4); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 62 | udelay(1); |
| 63 | |
Yu-Ping Wu | 31ec0c4 | 2019-10-09 16:11:47 +0800 | [diff] [blame] | 64 | dramc_dbg("impedance: K DRVP\n"); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 65 | setbits32(&ch[0].ao.impcal, 0x1 << 23); |
| 66 | setbits32(&ch[0].ao.impcal, 0x1 << 22); |
| 67 | clrbits32(&ch[0].ao.impcal, 0x1 << 21); |
| 68 | clrbits32(&ch[0].ao.shu[0].impcal1, 0x1f << 4 | 0x1f << 11); |
| 69 | clrsetbits32(&ch[0].phy.shu[0].ca_cmd[11], 0xff << 0, 0x3); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 70 | |
| 71 | for (u8 impx_drv = 0; impx_drv < 32; impx_drv++) { |
| 72 | impx_drv = (impx_drv == 16) ? 29 : impx_drv; |
| 73 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 74 | clrsetbits32(&ch[0].ao.shu[0].impcal1, |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 75 | 0x1f << 4, impx_drv << 4); |
| 76 | udelay(1); |
| 77 | imp_cal_result = (read32(&ch[0].phy_nao.misc_phy_rgs_cmd) >> |
| 78 | 24) & 0x1; |
Yu-Ping Wu | 31ec0c4 | 2019-10-09 16:11:47 +0800 | [diff] [blame] | 79 | dramc_dbg("1. OCD DRVP=%d CALOUT=%d\n", |
Yu-Ping Wu | c5568a1 | 2019-10-24 15:13:28 +0800 | [diff] [blame] | 80 | impx_drv, imp_cal_result); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 81 | |
| 82 | if (imp_cal_result == 1 && DRVP_result == 0xff) { |
| 83 | DRVP_result = impx_drv; |
Yu-Ping Wu | 31ec0c4 | 2019-10-09 16:11:47 +0800 | [diff] [blame] | 84 | dramc_dbg("1. OCD DRVP calibration OK! DRVP=%d\n", |
Yu-Ping Wu | c5568a1 | 2019-10-24 15:13:28 +0800 | [diff] [blame] | 85 | DRVP_result); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 86 | break; |
| 87 | } |
| 88 | } |
| 89 | |
Yu-Ping Wu | 31ec0c4 | 2019-10-09 16:11:47 +0800 | [diff] [blame] | 90 | dramc_dbg("impedance: K ODTN\n"); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 91 | dramc_sw_imp_cal_vref_sel(term, IMPCAL_STAGE_DRVN); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 92 | clrbits32(&ch[0].ao.impcal, 0x1 << 22); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 93 | if (term == ODT_ON) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 94 | setbits32(&ch[0].ao.impcal, 0x1 << 21); |
| 95 | clrsetbits32(&ch[0].ao.shu[0].impcal1, 0x1f << 4 | 0x1f << 11, |
Huayang Duan | cac990f | 2020-06-08 17:40:55 +0800 | [diff] [blame] | 96 | DRVP_result << 4); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 97 | clrsetbits32(&ch[0].phy.shu[0].ca_cmd[11], 0xff << 0, 0x3); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 98 | |
| 99 | for (u8 impx_drv = 0; impx_drv < 32; impx_drv++) { |
| 100 | impx_drv = (impx_drv == 16) ? 29 : impx_drv; |
| 101 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 102 | clrsetbits32(&ch[0].ao.shu[0].impcal1, |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 103 | 0x1f << 11, impx_drv << 11); |
| 104 | udelay(1); |
| 105 | imp_cal_result = (read32(&ch[0].phy_nao.misc_phy_rgs_cmd) >> |
| 106 | 24) & 0x1; |
Yu-Ping Wu | 31ec0c4 | 2019-10-09 16:11:47 +0800 | [diff] [blame] | 107 | dramc_dbg("3. OCD ODTN=%d CALOUT=%d\n", |
Yu-Ping Wu | c5568a1 | 2019-10-24 15:13:28 +0800 | [diff] [blame] | 108 | impx_drv, imp_cal_result); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 109 | |
| 110 | if (imp_cal_result == 0 && ODTN_result == 0xff) { |
| 111 | ODTN_result = impx_drv; |
Yu-Ping Wu | 31ec0c4 | 2019-10-09 16:11:47 +0800 | [diff] [blame] | 112 | dramc_dbg("3. OCD ODTN calibration OK! ODTN=%d\n", |
Yu-Ping Wu | c5568a1 | 2019-10-24 15:13:28 +0800 | [diff] [blame] | 113 | ODTN_result); |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 114 | break; |
| 115 | } |
| 116 | } |
| 117 | |
| 118 | write32(&ch[0].ao.impcal, impcal_bak); |
| 119 | |
Yu-Ping Wu | 85ca1fe | 2019-10-03 09:45:16 +0800 | [diff] [blame] | 120 | dramc_dbg("impedance: term=%d, DRVP=%d, DRVN=%d, ODTN=%d\n", |
| 121 | term, DRVP_result, DRVN_result, ODTN_result); |
Yu-Ping Wu | 4d4ccce | 2019-10-03 08:49:23 +0800 | [diff] [blame] | 122 | u32 *imp = impedance->data[term]; |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 123 | if (term == ODT_OFF) { |
Yu-Ping Wu | 4d4ccce | 2019-10-03 08:49:23 +0800 | [diff] [blame] | 124 | imp[0] = DRVP_result; |
| 125 | imp[1] = ODTN_result; |
| 126 | imp[2] = 0; |
| 127 | imp[3] = 15; |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 128 | } else { |
Yu-Ping Wu | 4d4ccce | 2019-10-03 08:49:23 +0800 | [diff] [blame] | 129 | imp[0] = (DRVP_result <= 3) ? (DRVP_result * 3) : DRVP_result; |
| 130 | imp[1] = (DRVN_result <= 3) ? (DRVN_result * 3) : DRVN_result; |
| 131 | imp[2] = 0; |
| 132 | imp[3] = (ODTN_result <= 3) ? (ODTN_result * 3) : ODTN_result; |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 133 | } |
| 134 | dramc_sw_imp_cal_vref_sel(term, IMPCAL_STAGE_TRACKING); |
| 135 | |
| 136 | dramc_set_broadcast(broadcast_bak); |
| 137 | } |
| 138 | |
Yu-Ping Wu | 4d4ccce | 2019-10-03 08:49:23 +0800 | [diff] [blame] | 139 | void dramc_sw_impedance_save_reg(u8 freq_group, |
| 140 | const struct dram_impedance *impedance) |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 141 | { |
| 142 | u8 ca_term = ODT_OFF, dq_term = ODT_ON; |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 143 | u32 sw_impedance[2][4] = {0}; |
| 144 | |
Huayang Duan | 7378015 | 2019-08-19 14:06:31 +0800 | [diff] [blame] | 145 | if (get_freq_fsq(freq_group) == FSP_0) |
| 146 | dq_term = ODT_OFF; |
| 147 | |
| 148 | for (u8 term = 0; term < 2; term++) |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 149 | for (u8 i = 0; i < 4; i++) |
Yu-Ping Wu | 4d4ccce | 2019-10-03 08:49:23 +0800 | [diff] [blame] | 150 | sw_impedance[term][i] = impedance->data[term][i]; |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 151 | |
| 152 | sw_impedance[ODT_OFF][2] = sw_impedance[ODT_ON][2]; |
| 153 | sw_impedance[ODT_OFF][3] = sw_impedance[ODT_ON][3]; |
| 154 | |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 155 | /* DQ */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 156 | clrsetbits32(&ch[0].ao.shu[0].drving[0], (0x1f << 5) | (0x1f << 0), |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 157 | (sw_impedance[dq_term][0] << 5) | |
| 158 | (sw_impedance[dq_term][1] << 0)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 159 | clrsetbits32(&ch[0].ao.shu[0].drving[1], |
Yu-Ping Wu | a39cd99 | 2019-08-29 10:54:14 +0800 | [diff] [blame] | 160 | (0x1f << 25) | (0x1f << 20) | (1 << 31), |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 161 | (sw_impedance[dq_term][0] << 25) | |
| 162 | (sw_impedance[dq_term][1] << 20) | (!dq_term << 31)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 163 | clrsetbits32(&ch[0].ao.shu[0].drving[2], (0x1f << 5) | (0x1f << 0), |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 164 | (sw_impedance[dq_term][2] << 5) | |
| 165 | (sw_impedance[dq_term][3] << 0)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 166 | clrsetbits32(&ch[0].ao.shu[0].drving[3], (0x1f << 25) | (0x1f << 20), |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 167 | (sw_impedance[dq_term][2] << 25) | |
| 168 | (sw_impedance[dq_term][3] << 20)); |
| 169 | |
| 170 | /* DQS */ |
| 171 | for (u8 i = 0; i <= 2; i += 2) { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 172 | clrsetbits32(&ch[0].ao.shu[0].drving[i], |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 173 | (0x1f << 25) | (0x1f << 20), |
| 174 | (sw_impedance[dq_term][i] << 25) | |
| 175 | (sw_impedance[dq_term][i + 1] << 20)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 176 | clrsetbits32(&ch[0].ao.shu[0].drving[i], |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 177 | (0x1f << 15) | (0x1f << 10), |
| 178 | (sw_impedance[dq_term][i] << 15) | |
| 179 | (sw_impedance[dq_term][i + 1] << 10)); |
| 180 | } |
| 181 | |
| 182 | /* CMD & CLK */ |
| 183 | for (u8 i = 1; i <= 3; i += 2) { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 184 | clrsetbits32(&ch[0].ao.shu[0].drving[i], |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 185 | (0x1f << 15) | (0x1f << 10), |
| 186 | (sw_impedance[ca_term][i - 1] << 15) | |
| 187 | (sw_impedance[ca_term][i] << 10)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 188 | clrsetbits32(&ch[0].ao.shu[0].drving[i], |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 189 | (0x1f << 5) | (0x1f << 0), |
| 190 | (sw_impedance[ca_term][i - 1] << 5) | |
| 191 | (sw_impedance[ca_term][i] << 0)); |
| 192 | } |
| 193 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 194 | clrsetbits32(&ch[0].phy.shu[0].ca_cmd[11], 0x1f << 17, |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 195 | sw_impedance[ca_term][0] << 17); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 196 | clrsetbits32(&ch[0].phy.shu[0].ca_cmd[11], 0x1f << 22, |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 197 | sw_impedance[ca_term][1] << 22); |
| 198 | |
Hung-Te Lin | 5b29f17 | 2019-09-19 17:49:34 +0800 | [diff] [blame] | 199 | SET32_BITFIELDS(&ch[0].phy.shu[0].ca_cmd[3], |
| 200 | SHU1_CA_CMD3_RG_TX_ARCMD_PU_PRE, 1); |
| 201 | SET32_BITFIELDS(&ch[0].phy.shu[0].ca_cmd[0], |
| 202 | SHU1_CA_CMD0_RG_TX_ARCLK_DRVN_PRE, 0); |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 203 | |
Huayang Duan | cac990f | 2020-06-08 17:40:55 +0800 | [diff] [blame] | 204 | dramc_set_broadcast(DRAMC_BROADCAST_OFF); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 205 | clrsetbits32(&ch[0].phy.shu[0].ca_dll[1], 0x1f << 16, 0x9 << 16); |
Huayang Duan | cac990f | 2020-06-08 17:40:55 +0800 | [diff] [blame] | 206 | clrsetbits32(&ch[1].phy.shu[0].ca_dll[1], 0x1f << 16, 0x9 << 16); |
| 207 | dramc_set_broadcast(DRAMC_BROADCAST_ON); |
Huayang Duan | 6c36d15 | 2018-09-26 15:37:58 +0800 | [diff] [blame] | 208 | } |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 209 | |
| 210 | static void transfer_pll_to_spm_control(void) |
| 211 | { |
Huayang Duan | c157ee9 | 2019-07-14 15:46:08 +0800 | [diff] [blame] | 212 | u8 shu_lev = (read32(&ch[0].ao.shustatus) >> 1) & 0x3; |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 213 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 214 | clrsetbits32(&mtk_spm->poweron_config_set, |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 215 | (0xffff << 16) | (0x1 << 0), |
| 216 | (0xb16 << 16) | (0x1 << 0)); |
| 217 | |
| 218 | /* Set SPM pinmux */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 219 | clrbits32(&mtk_spm->pcm_pwr_io_en, (0xff << 0) | (0xff << 16)); |
| 220 | setbits32(&mtk_spm->dramc_dpy_clk_sw_con_sel, 0xffffffff); |
| 221 | setbits32(&mtk_spm->dramc_dpy_clk_sw_con_sel2, 0xffffffff); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 222 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 223 | setbits32(&mtk_spm->spm_power_on_val0, (0x1 << 8) | (0xf << 12)); |
| 224 | setbits32(&mtk_spm->spm_s1_mode_ch, 0x3 << 0); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 225 | |
| 226 | shu_lev = (shu_lev == 1) ? 2 : 1; |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 227 | clrsetbits32(&mtk_spm->spm_power_on_val0, 0x3 << 28, shu_lev << 28); |
| 228 | clrsetbits32(&mtk_spm->dramc_dpy_clk_sw_con2, |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 229 | 0x3 << 2, shu_lev << 2); |
| 230 | |
| 231 | udelay(1); |
| 232 | for (size_t chn = CHANNEL_A; chn < CHANNEL_MAX; chn++) { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 233 | clrbits32(&ch[chn].phy.pll1, 0x1 << 31); |
| 234 | clrbits32(&ch[chn].phy.pll2, 0x1 << 31); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 235 | } |
| 236 | } |
| 237 | |
| 238 | static void dramc_rx_input_delay_tracking(u8 chn) |
| 239 | { |
| 240 | /* Enable RX_FIFO macro DIV4 clock CG */ |
| 241 | write32(&ch[chn].phy.misc_cg_ctrl1, 0xffffffff); |
| 242 | |
| 243 | /* DVS mode to RG mode */ |
| 244 | for (size_t r = 0; r < 2; r++) |
| 245 | for (size_t b = 0; b < 2; b++) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 246 | clrbits32(&ch[chn].phy.r[r].b[b].rxdvs[2], 3 << 30); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 247 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 248 | clrsetbits32(&ch[chn].phy.b0_rxdvs[0], 0x1 << 19, 0x1 << 9); |
| 249 | clrsetbits32(&ch[chn].phy.b1_rxdvs[0], 0x1 << 19, 0x1 << 9); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 250 | |
| 251 | for (size_t r = 0; r < 2; r++) |
| 252 | for (size_t b = 0; b < 2; b++) { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 253 | clrbits32(&ch[chn].phy.r[r].b[b].rxdvs[2], 1 << 29); |
| 254 | clrsetbits32(&ch[chn].phy.r[r].b[b].rxdvs[7], |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 255 | (0x3f << 0) | (0x3f << 8) | |
| 256 | (0x7f << 16) | (0x7f << 24), |
| 257 | (0x0 << 0) | (0x3f << 8) | |
| 258 | (0x0 << 16) | (0x7f << 24)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 259 | clrsetbits32(&ch[chn].phy.r[r].b[b].rxdvs[1], |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 260 | (0xffff << 16) | (0xffff << 0), |
| 261 | (0x2 << 16) | (0x2 << 0)); |
| 262 | |
| 263 | /* DQ/DQS Rx DLY adjustment for tracking mode */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 264 | clrbits32(&ch[chn].phy.r[r].b[b].rxdvs[2], |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 265 | (0x3 << 26) | (0x3 << 24) | |
| 266 | (0x3 << 18) | (0x3 << 16)); |
| 267 | } |
| 268 | |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 269 | /* Rx DLY tracking setting (Static) */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 270 | clrsetbits32(&ch[chn].phy.b0_rxdvs[0], |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 271 | (0x1 << 29) | (0xf << 4) | (0x1 << 0), |
| 272 | (0x1 << 29) | (0x0 << 4) | (0x1 << 0)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 273 | clrsetbits32(&ch[chn].phy.b1_rxdvs[0], |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 274 | (0x1 << 29) | (0xf << 4) | (0x1 << 0), |
| 275 | (0x1 << 29) | (0x0 << 4) | (0x1 << 0)); |
| 276 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 277 | for (u8 b = 0; b < 2; b++) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 278 | clrsetbits32(&ch[chn].phy.b[b].dq[9], |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 279 | (0x7 << 28) | (0x7 << 24), |
| 280 | (0x1 << 28) | (0x0 << 24)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 281 | clrbits32(&ch[chn].phy.ca_cmd[10], (0x7 << 28) | (0x7 << 24)); |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 282 | for (u8 b = 0; b < 2; b++) |
| 283 | setbits32(&ch[chn].phy.b[b].dq[5], 0x1 << 31); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 284 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 285 | setbits32(&ch[chn].phy.b0_rxdvs[0], (0x1 << 28) | (0x1 << 31)); |
| 286 | setbits32(&ch[chn].phy.b1_rxdvs[0], (0x1 << 28) | (0x1 << 31)); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 287 | for (u8 rank = RANK_0; rank < RANK_MAX; rank++) |
| 288 | for (u8 b = 0; b < 2; b++) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 289 | clrsetbits32(&ch[chn].phy.r[rank].b[b].rxdvs[2], |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 290 | (0x3 << 30) | (0x1 << 28) | (0x1 << 23), |
| 291 | (0x2 << 30) | (0x1 << 28) | (0x1 << 23)); |
| 292 | |
| 293 | } |
| 294 | |
| 295 | static void dramc_hw_dqs_gating_tracking(u8 chn) |
| 296 | { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 297 | clrsetbits32(&ch[chn].ao.stbcal, |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 298 | (0x1 << 21) | (0x3 << 15) | (0x1f << 8) | (0x1 << 4), |
| 299 | (0x3 << 26) | (0x1 << 0)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 300 | clrsetbits32(&ch[chn].ao.stbcal1, |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 301 | (0xffff << 16) | (0x1 << 8) | (0x1 << 6), |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 302 | (0x1 << 16) | (0x1 << 8) | (0x1 << 6)); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 303 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 304 | clrsetbits32(&ch[chn].phy.misc_ctrl0, |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 305 | (0x1 << 24) | (0x1f << 11) | (0xf << 0), |
| 306 | (0x1 << 24) | (0x0 << 11) | (0x0 << 0)); |
| 307 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 308 | clrbits32(&ch[chn].phy.b[0].dq[6], 0x1 << 31); |
| 309 | clrbits32(&ch[chn].phy.b[1].dq[6], 0x1 << 31); |
| 310 | clrbits32(&ch[chn].phy.ca_cmd[6], 0x1 << 31); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 311 | } |
| 312 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 313 | static void dramc_hw_gating_init(u8 chn) |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 314 | { |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 315 | clrbits32(&ch[chn].ao.stbcal, |
| 316 | (0x7 << 22) | (0x3 << 14) | (0x1 << 19) | (0x1 << 21)); |
| 317 | setbits32(&ch[chn].ao.stbcal, (0x1 << 20) | (0x3 << 28)); |
| 318 | setbits32(&ch[chn].phy.misc_ctrl1, 0x1 << 24); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 319 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 320 | dramc_hw_dqs_gating_tracking(chn); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | static void dramc_impedance_tracking_enable(void) |
| 324 | { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 325 | setbits32(&ch[0].phy.misc_ctrl0, 0x1 << 10); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 326 | for (size_t chn = 0; chn < CHANNEL_MAX; chn++) { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 327 | setbits32(&ch[chn].ao.impcal, (0x1 << 31) | (0x1 << 29) | |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 328 | (0x1 << 26) | (0x1 << 17) | (0x7 << 11)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 329 | clrbits32(&ch[chn].ao.impcal, 0x1 << 30); |
| 330 | setbits32(&ch[chn].phy.misc_ctrl0, 0x1 << 18); |
| 331 | setbits32(&ch[chn].ao.impcal, 0x1 << 19); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 332 | } |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 333 | setbits32(&ch[0].ao.impcal, 0x1 << 14); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 334 | for (size_t chn = 0; chn < CHANNEL_MAX; chn++) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 335 | setbits32(&ch[chn].ao.refctrl0, (0x1 << 2) | (0x1 << 3)); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 336 | } |
| 337 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 338 | static void dramc_phy_low_power_enable(u8 chn) |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 339 | { |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 340 | for (u8 b = 0; b < 2; b++) { |
| 341 | clrbits32(&ch[chn].phy.b[b].dll_fine_tune[2], 0x3fffff << 10); |
| 342 | write32(&ch[chn].phy.b[b].dll_fine_tune[3], 0x2e800); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 343 | } |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 344 | clrsetbits32(&ch[chn].phy.ca_dll_fine_tune[2], |
| 345 | 0x3fffff << 10, 0x2 << 10); |
| 346 | write32(&ch[chn].phy.ca_dll_fine_tune[3], |
| 347 | (chn == CHANNEL_A) ? 0xba000 : 0x3a000); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 348 | } |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 349 | |
| 350 | static void dramc_dummy_read_for_tracking_enable(u8 chn) |
| 351 | { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 352 | setbits32(&ch[chn].ao.dummy_rd, 0x3 << 16); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 353 | |
| 354 | for (size_t r = 0; r < 2; r++) |
| 355 | for (size_t i = 0; i < 4; i++) |
| 356 | write32(&ch[chn].ao.rk[r].dummy_rd_wdata[i], |
| 357 | 0xaaaa5555); |
| 358 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 359 | clrsetbits32(&ch[chn].ao.test2_4, 0x7 << 28, 0x4 << 28); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 360 | for (size_t r = 0; r < 2; r++) { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 361 | clrsetbits32(&ch[chn].ao.rk[r].dummy_rd_adr, |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 362 | (0x1ffff << 0) | (0x7ff << 17) | (0xf << 28), |
Huayang Duan | c157ee9 | 2019-07-14 15:46:08 +0800 | [diff] [blame] | 363 | (0xffff << 0) | (0x3f0 << 17)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 364 | clrbits32(&ch[chn].ao.rk[r].dummy_rd_bk, 0x7 << 0); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 365 | } |
| 366 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 367 | clrbits32(&ch[chn].ao.dummy_rd, 0x1 << 25 | 0x1 << 20); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 368 | } |
| 369 | |
| 370 | static void dramc_set_CKE_2_rank_independent(u8 chn) |
| 371 | { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 372 | clrsetbits32(&ch[chn].ao.rkcfg, (0x1 << 15) | (0x1 << 12), 0x1 << 2); |
| 373 | clrsetbits32(&ch[chn].ao.ckectrl, |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 374 | (0x1 << 1) | (0xf << 8) | (0x7 << 13), |
| 375 | (0x4 << 8) | (0x2 << 13)); |
| 376 | |
| 377 | for (u8 shu = 0; shu < DRAM_DFS_SHUFFLE_MAX; shu++) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 378 | setbits32(&ch[chn].ao.shu[shu].conf[2], |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 379 | (0x1 << 29) | (0x1 << 31)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 380 | clrbits32(&ch[chn].ao.dramctrl, 0x1 << 9); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 381 | } |
| 382 | |
| 383 | static void dramc_pa_improve(u8 chn) |
| 384 | { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 385 | clrbits32(&ch[chn].ao.clkar, 0xffff); |
| 386 | clrbits32(&ch[chn].ao.srefctrl, 0xf << 12); |
| 387 | clrbits32(&ch[chn].ao.zqcs, 0x1 << 19); |
| 388 | clrbits32(&ch[chn].ao.pre_tdqsck[0], 0x1 << 17); |
| 389 | clrbits32(&ch[chn].ao.zqcs, 0x1 << 19); |
| 390 | clrbits32(&ch[chn].ao.pre_tdqsck[0], 0x1 << 17); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 391 | |
| 392 | for (u8 shu = 0; shu < DRAM_DFS_SHUFFLE_MAX; shu++) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 393 | clrbits32(&ch[chn].ao.shu[shu].odtctrl, 0x3 << 2); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 394 | } |
| 395 | |
| 396 | static void dramc_enable_dramc_dcm(void) |
| 397 | { |
| 398 | for (size_t chn = 0; chn < CHANNEL_MAX; chn++) { |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 399 | clrsetbits32(&ch[chn].ao.dramc_pd_ctrl, |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 400 | (0x7 << 0) | (0x1 << 26) | (0x1 << 30) | (0x1 << 31), |
| 401 | (0x7 << 0) | (0x1 << 30) | (0x1 << 31)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 402 | setbits32(&ch[chn].ao.clkar, 0x1 << 31); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 403 | } |
| 404 | } |
| 405 | |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 406 | void dramc_runtime_config(void) |
| 407 | { |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 408 | for (u8 chn = 0; chn < CHANNEL_MAX; chn++) |
| 409 | clrbits32(&ch[chn].ao.refctrl0, 0x1 << 29); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 410 | |
| 411 | transfer_pll_to_spm_control(); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 412 | setbits32(&mtk_spm->spm_power_on_val0, 0x1 << 25); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 413 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 414 | for (u8 chn = 0; chn < CHANNEL_MAX; chn++) { |
Huayang Duan | 25930f4 | 2019-12-30 13:19:05 +0800 | [diff] [blame] | 415 | dramc_hw_dqsosc(chn); |
| 416 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 417 | /* RX_TRACKING: ON */ |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 418 | dramc_rx_input_delay_tracking(chn); |
| 419 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 420 | /* HW_GATING: ON */ |
| 421 | dramc_hw_gating_init(chn); |
| 422 | dramc_hw_gating_onoff(chn, true); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 423 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 424 | /* HW_GATING DBG: OFF */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 425 | clrbits32(&ch[chn].ao.stbcal2, |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 426 | (0x3 << 4) | (0x3 << 8) | (0x1 << 28)); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 427 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 428 | /* DUMMY_READ_FOR_TRACKING: ON */ |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 429 | dramc_dummy_read_for_tracking_enable(chn); |
| 430 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 431 | /* ZQCS_ENABLE_LP4: ON */ |
| 432 | clrbits32(&ch[chn].ao.spcmdctrl, 0x1 << 30); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 433 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 434 | /* LOWPOWER_GOLDEN_SETTINGS(DCM): ON */ |
| 435 | dramc_phy_low_power_enable(chn); |
| 436 | dramc_enable_phy_dcm(chn, true); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 437 | |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 438 | /* DUMMY_READ_FOR_DQS_GATING_RETRY: OFF */ |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 439 | for (size_t shu = 0; shu < DRAM_DFS_SHUFFLE_MAX; shu++) |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 440 | clrbits32(&ch[chn].ao.shu[shu].dqsg_retry, |
Huayang Duan | 04571d8 | 2020-01-21 10:40:01 +0800 | [diff] [blame] | 441 | (0x1 << 1) | (0x3 << 13)); |
| 442 | } |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 443 | |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 444 | /* SPM_CONTROL_AFTERK: ON */ |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 445 | write32(&ch[0].phy.misc_spm_ctrl0, 0xfbffefff); |
| 446 | write32(&ch[1].phy.misc_spm_ctrl0, 0xfbffefff); |
| 447 | write32(&ch[0].phy.misc_spm_ctrl2, 0xffffffef); |
| 448 | write32(&ch[1].phy.misc_spm_ctrl2, 0x7fffffef); |
| 449 | |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 450 | /* IMPEDANCE_TRACKING: ON */ |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 451 | dramc_impedance_tracking_enable(); |
| 452 | |
| 453 | for (size_t chn = 0; chn < CHANNEL_MAX; chn++) { |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 454 | /* TEMP_SENSOR: ON */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 455 | clrbits32(&ch[chn].ao.spcmdctrl, 0x3 << 28); |
| 456 | setbits32(&ch[chn].ao.hw_mrr_fun, (0x1 << 0) | (0x1 << 11)); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 457 | |
| 458 | /* PER_BANK_REFRESH: ON */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 459 | clrbits32(&ch[chn].ao.refctrl0, 0x1 << 18); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 460 | |
| 461 | /* HW_SAVE_FOR_SR: ON */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 462 | clrbits32(&ch[chn].ao.rstmask, (0x1 << 25) | (0x1 << 28)); |
| 463 | setbits32(&ch[chn].ao.refctrl1, 0x1 << 0); |
| 464 | clrsetbits32(&ch[chn].ao.srefctrl, 0x1 << 20, 0x1 << 22); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 465 | |
| 466 | /* SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON */ |
| 467 | dramc_set_CKE_2_rank_independent(chn); |
| 468 | |
| 469 | /* CLK_FREE_FUN_FOR_DRAMC_PSEL: ON */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 470 | clrbits32(&ch[chn].ao.refctrl1, (0x1 << 6) | (0x3 << 2)); |
| 471 | clrbits32(&ch[chn].ao.clkar, 0x1 << 19); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 472 | |
| 473 | /* PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON */ |
| 474 | dramc_pa_improve(chn); |
| 475 | |
| 476 | /* DRAM DRS DISABLE */ |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 477 | clrsetbits32(&ch[chn].ao.drsctrl, |
Huayang Duan | 31b081a | 2020-03-18 13:49:00 +0800 | [diff] [blame] | 478 | (0x1 << 0) | (0x1 << 2) | (0x1 << 4) | (0x1 << 5) | (0x1 << 6) | |
| 479 | (0xf << 8) | (0x7f << 12) | (0x1 << 19) | (0x1 << 21), |
| 480 | (0x1 << 0) | (0x0 << 2) | (0x0 << 4) | (0x1 << 5) | (0x0 << 6) | |
| 481 | (0x8 << 8) | (0x3 << 12) | (0x1 << 19) | (0x0 << 21)); |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 482 | setbits32(&ch[chn].ao.dummy_rd, 0x3 << 26); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 483 | } |
Huayang Duan | 25930f4 | 2019-12-30 13:19:05 +0800 | [diff] [blame] | 484 | dramc_dqs_precalculation_preset(); |
mtk11195 | 16ad2d7 | 2019-01-23 11:41:19 +0800 | [diff] [blame] | 485 | |
| 486 | enable_emi_dcm(); |
| 487 | dramc_enable_dramc_dcm(); |
Huayang Duan | 7b78a80 | 2018-09-26 21:09:54 +0800 | [diff] [blame] | 488 | } |