blob: d5190683aea5b2cab0aa91bcf9817884e94c5feb [file] [log] [blame]
Chris Chingaa8e5d32017-10-20 10:43:39 -06001# Load all chipsets
Subrata Banik03abf8d2020-03-14 13:19:14 +05302source "src/soc/intel/*/Kconfig"
Chris Chingaa8e5d32017-10-20 10:43:39 -06003
4# Load common config
Subrata Banik03abf8d2020-03-14 13:19:14 +05305source "src/soc/intel/common/Kconfig.common"
Rizwan Qureshib08267022017-11-16 13:32:29 +05306
7config INTEL_HAS_TOP_SWAP
8 bool
9 help
10 Set this config if the Intel SoC supports top swap feature
11
12config INTEL_ADD_TOP_SWAP_BOOTBLOCK
13 bool "Include a Top swap bootblock"
14 default n
15 depends on INTEL_HAS_TOP_SWAP
16 help
17 Intel PCH/Southbridges have feature that it is possible to have
18 the southbridge/PCH look for the bootblock at a 64K or
19 128K/256K/512K/1MB (in case of newer SoCs) offset
20 instead of the usual top of flash.
21 Select this to put a 'second' bootblock.
22
23config INTEL_TOP_SWAP_BOOTBLOCK_SIZE
24 hex "Size of top swap boot block"
25 depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
26 default 0x10000
27 help
28 Set this config to a supported topswap size.
29 Valid sizes: 0x10000 0x20000 0x40000 0x80000 0x100000
Rizwan Qureshi53485122018-06-18 19:50:18 +053030
31config INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG
32 string
33 depends on INTEL_ADD_TOP_SWAP_BOOTBLOCK
34 help
35 Use this config to specify the name of a FMAP region (which should
36 hold a microcode) whose address as the first entry in the topswap FIT.
37 This is useful in creating a asymmetric FIT in top swap bootblock
38 than the one in non-topswap bootblock. This string will be passed
Patrick Rudolph9ab80a32019-02-18 14:35:54 +010039 onto ifittool (-A -n option). ifittool will not parse the region for MCU
Rizwan Qureshi53485122018-06-18 19:50:18 +053040 entries, and only locate the region and insert its address into FIT.