blob: 332465ae19765d281133ae3a38b268d5c8d9cca0 [file] [log] [blame]
Hannah Williams5e83e8b2018-02-09 18:35:17 -08001FLASH 16M {
2 WP_RO@0x0 0x400000 {
3 SI_DESC@0x0 0x1000
4 IFWI@0x1000 0x1ff000
Hung-Te Line5861822019-03-04 16:48:05 +08005 RO_VPD(PRESERVE)@0x200000 0x4000
Hannah Williams5e83e8b2018-02-09 18:35:17 -08006 RO_SECTION@0x204000 0x1fc000 {
7 FMAP@0x0 0x800
8 RO_FRID@0x800 0x40
9 RO_FRID_PAD@0x840 0x7c0
Hung-Te Lin064d6cb2019-10-17 12:42:28 +080010 COREBOOT(CBFS)@0x1000 0x1f8000
11 GBB@0x1f9000 0x3000
Hannah Williams5e83e8b2018-02-09 18:35:17 -080012 }
13 }
14 MISC_RW@0x400000 0x30000 {
Hung-Te Line5861822019-03-04 16:48:05 +080015 RW_PRESERVE(PRESERVE) {
Furquan Shaikh076ce2f2018-10-18 12:12:22 -070016 UNIFIED_MRC_CACHE@0x0 0x21000 {
17 RECOVERY_MRC_CACHE@0x0 0x10000
18 RW_MRC_CACHE@0x10000 0x10000
19 RW_VAR_MRC_CACHE@0x20000 0x1000
20 }
Hannah Williams5e83e8b2018-02-09 18:35:17 -080021 }
Hung-Te Line5861822019-03-04 16:48:05 +080022 RW_ELOG(PRESERVE)@0x21000 0x3000
Hannah Williams5e83e8b2018-02-09 18:35:17 -080023 RW_SHARED@0x24000 0x4000 {
24 SHARED_DATA@0x0 0x2000
25 VBLOCK_DEV@0x2000 0x2000
26 }
Hung-Te Line5861822019-03-04 16:48:05 +080027 RW_VPD(PRESERVE)@0x28000 0x2000
28 RW_NVRAM(PRESERVE)@0x2a000 0x5000
Hannah Williams5e83e8b2018-02-09 18:35:17 -080029 FPF_STATUS@0x2f000 0x1000
30 }
31 RW_SECTION_A@0x430000 0x480000 {
32 VBLOCK_A@0x0 0x10000
33 FW_MAIN_A(CBFS)@0x10000 0x46ffc0
34 RW_FWID_A@0x47ffc0 0x40
35 }
36 RW_SECTION_B@0x8b0000 0x480000 {
37 VBLOCK_B@0x0 0x10000
38 FW_MAIN_B(CBFS)@0x10000 0x46ffc0
39 RW_FWID_B@0x47ffc0 0x40
40 }
Hung-Te Line5861822019-03-04 16:48:05 +080041 SMMSTORE(PRESERVE)@0xd30000 0x40000
Patrick Georgi803cf022018-09-06 18:15:43 +020042 RW_LEGACY(CBFS)@0xd70000 0x1c0000
Hannah Williams5e83e8b2018-02-09 18:35:17 -080043 BIOS_UNUSABLE@0xf30000 0x4f000
44 DEVICE_EXTENSION@0xf7f000 0x80000
45 # Currently, it is required that the BIOS region be a multiple of 8KiB.
46 # This is required so that the recovery mechanism can find SIGN_CSE
47 # region aligned to 4K at the center of BIOS region. Since the
48 # descriptor at the beginning uses 4K and BIOS starts at an offset of
49 # 4K, a hole of 4K is created towards the end of the flash to compensate
50 # for the size requirement of BIOS region.
51 # FIT tool thus creates descriptor with following regions:
52 # Descriptor --> 0 to 4K
53 # BIOS --> 4K to 0xf7f000
54 # Device ext --> 0xf7f000 to 0xfff000
55 UNUSED_HOLE@0xfff000 0x1000
56}