Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 1 | #include <stdint.h> |
Myles Watson | 3426195 | 2010-03-19 02:33:40 +0000 | [diff] [blame] | 2 | #include <lib.h> /* Prototypes */ |
Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 3 | #include <console/console.h> |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 4 | #include <device/mmio.h> |
Myles Watson | 3426195 | 2010-03-19 02:33:40 +0000 | [diff] [blame] | 5 | |
Kyösti Mälkki | 7336f97 | 2020-06-08 06:05:03 +0300 | [diff] [blame] | 6 | #if ENV_X86 && CONFIG(SSE2) |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 7 | /* Assembler in lib/ is ugly. */ |
| 8 | static void write_phys(uintptr_t addr, u32 value) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 9 | { |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 10 | asm volatile ( |
Eric Biederman | 8d9c123 | 2003-06-17 08:42:17 +0000 | [diff] [blame] | 11 | "movnti %1, (%0)" |
| 12 | : /* outputs */ |
| 13 | : "r" (addr), "r" (value) /* inputs */ |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 14 | ); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 15 | } |
| 16 | |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 17 | static void phys_memory_barrier(void) |
| 18 | { |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 19 | // Needed for movnti |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 20 | asm volatile ("sfence" ::: "memory"); |
| 21 | } |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 22 | #else |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 23 | static void write_phys(uintptr_t addr, u32 value) |
| 24 | { |
| 25 | write32((void *)addr, value); |
| 26 | } |
| 27 | |
| 28 | static void phys_memory_barrier(void) |
| 29 | { |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 30 | asm volatile ("" ::: "memory"); |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 31 | } |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 32 | #endif |
Kyösti Mälkki | 321bce4 | 2019-03-20 19:53:44 +0200 | [diff] [blame] | 33 | |
| 34 | static u32 read_phys(uintptr_t addr) |
| 35 | { |
| 36 | return read32((void *)addr); |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 37 | } |
| 38 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 39 | /** |
| 40 | * Rotate ones test pattern that access every bit on a 128bit wide |
| 41 | * memory bus. To test most address lines, addresses are scattered |
| 42 | * using 256B, 4kB and 64kB increments. |
| 43 | * |
Martin Roth | 5f066b2 | 2015-01-04 16:47:39 -0700 | [diff] [blame] | 44 | * @param idx Index to test pattern (0=<idx<0x400) |
| 45 | * @param addr Memory to access on idx |
| 46 | * @param value Value to write or read at addr |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 47 | */ |
| 48 | static inline void test_pattern(unsigned short int idx, |
| 49 | unsigned long *addr, unsigned long *value) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 50 | { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 51 | uint8_t j, k; |
| 52 | |
| 53 | k = (idx >> 8) + 1; |
| 54 | j = (idx >> 4) & 0x0f; |
| 55 | *addr = idx & 0x0f; |
| 56 | *addr |= j << (4*k); |
| 57 | *value = 0x01010101 << (j & 7); |
| 58 | if (j & 8) |
| 59 | *value = ~(*value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 60 | } |
| 61 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 62 | /** |
| 63 | * Simple write-read-verify memory test. See console debug output for |
| 64 | * any dislocated bytes. |
| 65 | * |
Patrick Rudolph | 3dbd284 | 2017-10-27 11:49:29 +0200 | [diff] [blame] | 66 | * Tests 1MiB of memory starting from start. |
| 67 | * |
Martin Roth | 5f066b2 | 2015-01-04 16:47:39 -0700 | [diff] [blame] | 68 | * @param start System memory offset, aligned to 128bytes |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 69 | */ |
| 70 | static int ram_bitset_nodie(unsigned long start) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 71 | { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 72 | unsigned long addr, value, value2; |
| 73 | unsigned short int idx; |
| 74 | unsigned char failed, failures; |
| 75 | uint8_t verbose = 0; |
| 76 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 77 | printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start); |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 78 | for (idx = 0; idx < 0x400; idx += 4) { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 79 | test_pattern(idx, &addr, &value); |
| 80 | write_phys(start + addr, value); |
| 81 | } |
| 82 | |
| 83 | /* Make sure we don't read before we wrote */ |
| 84 | phys_memory_barrier(); |
| 85 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 86 | printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start); |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 87 | failures = 0; |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 88 | for (idx = 0; idx < 0x400; idx += 4) { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 89 | test_pattern(idx, &addr, &value); |
| 90 | value2 = read_phys(start + addr); |
| 91 | |
| 92 | failed = (value2 != value); |
| 93 | failures |= failed; |
Elyes HAOUAS | 1943f37 | 2018-05-04 16:30:39 +0200 | [diff] [blame] | 94 | if (failed && !verbose) { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 95 | printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n", |
| 96 | start + addr, value, value2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 97 | } |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 98 | if (verbose) { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 99 | if ((addr & 0x0f) == 0) |
| 100 | printk(BIOS_DEBUG, "%08lx wr: %08lx rd:", |
| 101 | start + addr, value); |
| 102 | if (failed) |
| 103 | printk(BIOS_DEBUG, " %08lx!", value2); |
| 104 | else |
| 105 | printk(BIOS_DEBUG, " %08lx ", value2); |
| 106 | if ((addr & 0x0f) == 0xc) |
| 107 | printk(BIOS_DEBUG, "\n"); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 108 | } |
| 109 | } |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 110 | if (failures) { |
| 111 | post_code(0xea); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 112 | printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 113 | return 1; |
Richard Smith | ffb7d8a | 2006-04-01 04:10:44 +0000 | [diff] [blame] | 114 | } |
Lee Leahy | 3e1cab4 | 2017-03-10 17:48:31 -0800 | [diff] [blame] | 115 | printk(BIOS_DEBUG, "\nDRAM range verified.\n"); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 116 | return 0; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 117 | } |
| 118 | |
| 119 | |
Eric Biederman | 8d9c123 | 2003-06-17 08:42:17 +0000 | [diff] [blame] | 120 | void ram_check(unsigned long start, unsigned long stop) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 121 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 122 | /* |
| 123 | * This is much more of a "Is my DRAM properly configured?" |
| 124 | * test than a "Is my DRAM faulty?" test. Not all bits |
| 125 | * are tested. -Tyson |
| 126 | */ |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 127 | printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start); |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 128 | if (ram_bitset_nodie(start)) |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 129 | die("DRAM ERROR"); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 130 | printk(BIOS_DEBUG, "Done.\n"); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 131 | } |
| 132 | |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 133 | |
| 134 | int ram_check_nodie(unsigned long start, unsigned long stop) |
| 135 | { |
| 136 | int ret; |
| 137 | /* |
| 138 | * This is much more of a "Is my DRAM properly configured?" |
| 139 | * test than a "Is my DRAM faulty?" test. Not all bits |
| 140 | * are tested. -Tyson |
| 141 | */ |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 142 | printk(BIOS_DEBUG, "Testing DRAM at : %08lx\n", start); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 143 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 144 | ret = ram_bitset_nodie(start); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 145 | printk(BIOS_DEBUG, "Done.\n"); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 146 | return ret; |
| 147 | } |
| 148 | |
Alexandru Gagniuc | 5239ba2 | 2013-06-08 11:32:36 -0500 | [diff] [blame] | 149 | int ram_check_noprint_nodie(unsigned long start, unsigned long stop) |
| 150 | { |
| 151 | unsigned long addr, value, value2; |
| 152 | unsigned short int idx; |
| 153 | unsigned char failed, failures; |
| 154 | |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 155 | for (idx = 0; idx < 0x400; idx += 4) { |
Alexandru Gagniuc | 5239ba2 | 2013-06-08 11:32:36 -0500 | [diff] [blame] | 156 | test_pattern(idx, &addr, &value); |
| 157 | write_phys(start + addr, value); |
| 158 | } |
| 159 | |
| 160 | /* Make sure we don't read before we wrote */ |
| 161 | phys_memory_barrier(); |
| 162 | |
| 163 | failures = 0; |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 164 | for (idx = 0; idx < 0x400; idx += 4) { |
Alexandru Gagniuc | 5239ba2 | 2013-06-08 11:32:36 -0500 | [diff] [blame] | 165 | test_pattern(idx, &addr, &value); |
| 166 | value2 = read_phys(start + addr); |
| 167 | |
| 168 | failed = (value2 != value); |
| 169 | failures |= failed; |
| 170 | } |
| 171 | return failures; |
| 172 | } |
| 173 | |
Kyösti Mälkki | f5cf60f | 2019-03-18 15:26:48 +0200 | [diff] [blame] | 174 | /* Assumption is 32-bit addressable UC memory at dst. This also executes |
| 175 | * on S3 resume path so target memory must be restored. |
| 176 | */ |
| 177 | void quick_ram_check_or_die(uintptr_t dst) |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 178 | { |
| 179 | int fail = 0; |
| 180 | u32 backup; |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 181 | backup = read_phys(dst); |
| 182 | write_phys(dst, 0x55555555); |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 183 | phys_memory_barrier(); |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 184 | if (read_phys(dst) != 0x55555555) |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 185 | fail = 1; |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 186 | write_phys(dst, 0xaaaaaaaa); |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 187 | phys_memory_barrier(); |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 188 | if (read_phys(dst) != 0xaaaaaaaa) |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 189 | fail = 1; |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 190 | write_phys(dst, 0x00000000); |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 191 | phys_memory_barrier(); |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 192 | if (read_phys(dst) != 0x00000000) |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 193 | fail = 1; |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 194 | write_phys(dst, 0xffffffff); |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 195 | phys_memory_barrier(); |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 196 | if (read_phys(dst) != 0xffffffff) |
Lee Leahy | 35af5c4 | 2017-03-09 17:35:28 -0800 | [diff] [blame] | 197 | fail = 1; |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 198 | |
Kyösti Mälkki | 19652e6 | 2016-06-17 23:31:42 +0300 | [diff] [blame] | 199 | write_phys(dst, backup); |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 200 | if (fail) { |
| 201 | post_code(0xea); |
| 202 | die("RAM INIT FAILURE!\n"); |
| 203 | } |
| 204 | phys_memory_barrier(); |
| 205 | } |