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review.coreboot.org / coreboot / baf27dbaeb1f6791ebfc416f2175507686bd88ac / . / src / arch / x86 / assembly_entry.S
blob: 31670c29b69c17cfbd0075d8610cae0523e68cf6 [file] [log] [blame]
Patrick Georgi11f00792020-03-04 15:10:45 +0100[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Aaron Durbine581b062015-09-03 11:29:28 -0500[diff] [blame]2
Aaron Durbinaef58652016-04-29 12:34:01 -0500[diff] [blame]3#include <rules.h>
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]4
Aaron Durbinaef58652016-04-29 12:34:01 -0500[diff] [blame]5/*
Arthur Heymansc05b1a62019-11-22 21:01:30 +0100[diff] [blame]6 * This path is for stages that are post bootblock. The gdt is reloaded
7 * to accommodate platforms that are executing out of CAR. In order to
8 * continue with C code execution one needs to set stack pointer and
9 * clear .bss variables that are stage specific.
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]10 */
Felix Heldca928c62020-04-04 01:47:37 +0200[diff] [blame]11
12#if CONFIG(RESET_VECTOR_IN_RAM)
13 #define _STACK_TOP _eearlyram_stack
14#else
15 #define _STACK_TOP _ecar_stack
16#endif
17
Patrick Rudolph29ed4f52020-07-05 08:46:55 +0200[diff] [blame]18#ifdef __x86_64__
19.code64
20#else
21.code32
22#endif
23
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]24.section ".text._start", "ax", @progbits
25.global _start
26_start:
27
Hannah Williamsd3c0c0c2018-04-27 09:09:04 -0700[diff] [blame]28 /* Migrate GDT to this text segment */
Patrick Rudolph29ed4f52020-07-05 08:46:55 +0200[diff] [blame]29#ifdef __x86_64__
30 call gdt_init64
31#else
Hannah Williamsd3c0c0c2018-04-27 09:09:04 -0700[diff] [blame]32 call gdt_init
Patrick Rudolph29ed4f52020-07-05 08:46:55 +0200[diff] [blame]33#endif
Hannah Williamsd3c0c0c2018-04-27 09:09:04 -0700[diff] [blame]34
Felix Heldca928c62020-04-04 01:47:37 +0200[diff] [blame]35 /* reset stack pointer to CAR/EARLYRAM stack */
36 mov $_STACK_TOP, %esp
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]37
Kyösti Mälkki910490f2019-08-22 12:56:22 +0300[diff] [blame]38 /* clear .bss section as it is not shared */
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]39 cld
40 xor %eax, %eax
Kyösti Mälkki910490f2019-08-22 12:56:22 +0300[diff] [blame]41 movl $(_ebss), %ecx
42 movl $(_bss), %edi
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]43 sub %edi, %ecx
Kyösti Mälkki5cbaba42019-08-28 20:52:37 +0300[diff] [blame]44 shrl $2, %ecx
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]45 rep stosl
46
Julius Werner21a40532020-04-21 16:03:53 -0700[diff] [blame]47#if ((ENV_SEPARATE_VERSTAGE && CONFIG(VERSTAGE_DEBUG_SPINLOOP)) \
Julius Wernercd49cce2019-03-05 16:53:33 -0800[diff] [blame]48 || (ENV_ROMSTAGE && CONFIG(ROMSTAGE_DEBUG_SPINLOOP)))
Lee Leahyd131ea32016-06-08 13:40:08 -0700[diff] [blame]49
50 /* Wait for a JTAG debugger to break in and set EBX non-zero */
51 xor %ebx, %ebx
52
53debug_spinloop:
54 cmp $0, %ebx
55 jz debug_spinloop
56#endif
57
Marshall Dawsonce9c8832017-07-07 16:09:56 -0600[diff] [blame]58 andl $0xfffffff0, %esp
Julius Wernercd49cce2019-03-05 16:53:33 -0800[diff] [blame]59#if CONFIG(IDT_IN_EVERY_STAGE)
Aaron Durbin4b032e42018-04-20 01:39:30 -0600[diff] [blame]60 call exception_init
61#endif
Harshit Sharmaa6ebe082020-07-20 00:21:05 -0700[diff] [blame]62
63#if CONFIG(ASAN_IN_ROMSTAGE)
64 call asan_init
65#endif
Marshall Dawsonce9c8832017-07-07 16:09:56 -0600[diff] [blame]66 call car_stage_entry
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]67
Aaron Durbinafec0712019-08-28 07:34:51 -0600[diff] [blame]68 /* Expect to never return. */
Andrey Petrov73f70692016-02-28 22:37:15 -0800[diff] [blame]691:
70 jmp 1b