Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 1 | # |
| 2 | # This file is part of the coreboot project. |
| 3 | # |
| 4 | # Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com> |
| 5 | # |
| 6 | # This program is free software; you can redistribute it and/or modify |
| 7 | # it under the terms of the GNU General Public License as published by |
| 8 | # the Free Software Foundation; either version 2 of the License, or |
| 9 | # (at your option) any later version. |
| 10 | # |
| 11 | # This program is distributed in the hope that it will be useful, |
| 12 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | # GNU General Public License for more details. |
| 15 | # |
| 16 | |
| 17 | chip northbridge/intel/sandybridge |
| 18 | register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }" |
| 19 | register "gfx.link_frequency_270_mhz" = "1" |
| 20 | register "gfx.ndid" = "3" |
| 21 | register "gfx.use_spread_spectrum_clock" = "1" |
| 22 | register "gpu_cpu_backlight" = "0x00000437" |
| 23 | register "gpu_dp_b_hotplug" = "4" |
| 24 | register "gpu_dp_c_hotplug" = "4" |
| 25 | register "gpu_dp_d_hotplug" = "4" |
| 26 | register "gpu_panel_port_select" = "0" |
| 27 | register "gpu_panel_power_backlight_off_delay" = "2300" |
| 28 | register "gpu_panel_power_backlight_on_delay" = "2000" |
| 29 | register "gpu_panel_power_cycle_delay" = "5" |
| 30 | register "gpu_panel_power_down_delay" = "230" |
| 31 | register "gpu_panel_power_up_delay" = "300" |
| 32 | register "gpu_pch_backlight" = "0x0d9c0d9c" |
| 33 | device cpu_cluster 0x0 on |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 34 | chip cpu/intel/model_206ax |
| 35 | register "c1_acpower" = "1" |
| 36 | register "c1_battery" = "1" |
| 37 | register "c2_acpower" = "3" |
| 38 | register "c2_battery" = "3" |
| 39 | register "c3_acpower" = "5" |
| 40 | register "c3_battery" = "5" |
Arthur Heymans | 7e6946a | 2019-01-21 17:55:02 +0100 | [diff] [blame] | 41 | device lapic 0x0 on end |
Arthur Heymans | b3f2323 | 2019-01-21 17:48:55 +0100 | [diff] [blame] | 42 | device lapic 0xacac off end |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 43 | end |
| 44 | end |
| 45 | device domain 0x0 on |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 46 | subsystemid 0x103c 0x17df inherit |
Angel Pons | 942650f | 2020-01-01 20:56:08 +0100 | [diff] [blame] | 47 | |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 48 | device pci 00.0 on end # Host bridge |
Angel Pons | 942650f | 2020-01-01 20:56:08 +0100 | [diff] [blame] | 49 | device pci 01.0 off end # PCIe Bridge for discrete graphics |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 50 | device pci 02.0 on end # Internal graphics |
Angel Pons | 942650f | 2020-01-01 20:56:08 +0100 | [diff] [blame] | 51 | |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 52 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
| 53 | register "c2_latency" = "0x0065" |
| 54 | register "docking_supported" = "0" |
Arthur Heymans | 6beaef9 | 2019-06-16 23:29:23 +0200 | [diff] [blame] | 55 | # mailbox at 0x200/0x201 and PM1 at 0x220 |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 56 | register "gen1_dec" = "0x007c0201" |
| 57 | register "gen2_dec" = "0x000c0101" |
| 58 | register "gen3_dec" = "0x00fcfe01" |
| 59 | register "gen4_dec" = "0x000402e9" |
| 60 | register "gpi6_routing" = "2" |
Iru Cai | e9edd27 | 2017-09-01 10:17:27 +0800 | [diff] [blame] | 61 | register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 62 | register "pcie_port_coalesce" = "1" |
| 63 | register "sata_interface_speed_support" = "0x3" |
| 64 | register "sata_port_map" = "0x33" |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 65 | register "spi_uvscc" = "0x2005" |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 66 | register "spi_lvscc" = "0" |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 67 | register "superspeed_capable_ports" = "0x0000000f" |
| 68 | register "xhci_overcurrent_mapping" = "0x00000c03" |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 69 | register "xhci_switchable_ports" = "0x0000000f" |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 70 | |
| 71 | device pci 14.0 on end # USB 3.0 Controller |
| 72 | device pci 16.0 on end # Management Engine Interface 1 |
| 73 | device pci 16.1 off end # Management Engine Interface 2 |
| 74 | device pci 16.2 off end # Management Engine IDE-R |
| 75 | device pci 16.3 off end # Management Engine KT |
| 76 | device pci 19.0 on end # Intel Gigabit Ethernet |
| 77 | device pci 1a.0 on end # USB2 EHCI #2 |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 78 | device pci 1b.0 on end # HD Audio controller |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 79 | device pci 1c.0 on end # PCIe Port #1 |
| 80 | device pci 1c.1 on end # PCIe Port #2, ExpressCard |
| 81 | device pci 1c.2 on end # PCIe Port #3, SD/MMC |
| 82 | device pci 1c.3 on end # PCIe Port #4, WLAN |
| 83 | device pci 1c.4 off end # PCIe Port #5 |
| 84 | device pci 1c.5 off end # PCIe Port #6 |
| 85 | device pci 1c.6 off end # PCIe Port #7 |
| 86 | device pci 1c.7 off end # PCIe Port #8 |
| 87 | device pci 1d.0 on end # USB2 EHCI #1 |
| 88 | device pci 1e.0 off end # PCI bridge |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 89 | device pci 1f.0 on # LPC bridge |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 90 | chip ec/hp/kbc1126 |
| 91 | register "ec_data_port" = "0x62" |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 92 | register "ec_cmd_port" = "0x66" |
| 93 | register "ec_ctrl_reg" = "0x81" |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 94 | register "ec_fan_ctrl_value" = "0x4d" |
| 95 | device pnp ff.1 off end |
Angel Pons | c97802f | 2020-01-01 21:27:43 +0100 | [diff] [blame] | 96 | end |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 97 | end |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 98 | device pci 1f.2 on end # SATA Controller 1 |
Angel Pons | 12197db | 2020-01-01 21:31:21 +0100 | [diff] [blame] | 99 | device pci 1f.3 on end # SMBus |
Angel Pons | a0a3eab | 2020-01-01 20:52:11 +0100 | [diff] [blame] | 100 | device pci 1f.5 off end # SATA Controller 2 |
| 101 | device pci 1f.6 off end # Thermal |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 102 | end |
Iru Cai | 6f08ef9 | 2017-07-07 21:44:42 +0800 | [diff] [blame] | 103 | end |
| 104 | end |