Vladimir Serbinenko | c6f6be0 | 2013-11-12 22:32:08 +0100 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2010 Google Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
| 20 | config NORTHBRIDGE_INTEL_NEHALEM |
| 21 | bool |
| 22 | select CPU_INTEL_MODEL_2065X |
| 23 | select MMCONF_SUPPORT |
| 24 | select MMCONF_SUPPORT_DEFAULT |
Kyösti Mälkki | 502e1dc | 2014-06-13 11:07:34 +0300 | [diff] [blame] | 25 | select DYNAMIC_CBMEM |
Vladimir Serbinenko | c6f6be0 | 2013-11-12 22:32:08 +0100 | [diff] [blame] | 26 | select VGA |
Vladimir Serbinenko | 1315730 | 2014-02-19 22:18:08 +0100 | [diff] [blame] | 27 | select INTEL_EDID |
Edward O'Callaghan | ba92428 | 2014-06-27 12:13:30 +1000 | [diff] [blame^] | 28 | select TSC_MONOTONIC_TIMER |
Vladimir Serbinenko | c6f6be0 | 2013-11-12 22:32:08 +0100 | [diff] [blame] | 29 | |
| 30 | if NORTHBRIDGE_INTEL_NEHALEM |
| 31 | |
| 32 | config VGA_BIOS_ID |
| 33 | string |
| 34 | default "8086,0046" |
| 35 | |
| 36 | config DCACHE_RAM_BASE |
| 37 | hex |
| 38 | default 0xff7f0000 |
| 39 | |
| 40 | config DCACHE_RAM_SIZE |
| 41 | hex |
| 42 | default 0x10000 |
| 43 | |
| 44 | config BOOTBLOCK_NORTHBRIDGE_INIT |
| 45 | string |
| 46 | default "northbridge/intel/nehalem/bootblock.c" |
| 47 | |
| 48 | config TRAINING_CACHE_SIZE |
| 49 | hex |
| 50 | default 0x10000 |
| 51 | |
| 52 | config CBFS_SIZE |
| 53 | hex "Size of CBFS filesystem in ROM" |
| 54 | default 0x100000 |
| 55 | help |
| 56 | On Nehalem systems the firmware image has to |
| 57 | store a lot more than just coreboot, including: |
| 58 | - a firmware descriptor |
| 59 | - Intel Management Engine firmware |
| 60 | This option allows to limit the size of the CBFS portion in the |
| 61 | firmware image. |
| 62 | |
| 63 | endif |