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review.coreboot.org / coreboot / ba5a2a189ef8594b773888f94ef9fd3ffa199fc4 / . / src / mainboard / google / myst / port_descriptors.c
blob: 108dd4e6395b64105f1b4f63e6c4ed1572fb6734 [file] [log] [blame]
Jon Murphya8590572023-02-23 13:42:52 -0700[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2
Jon Murphy462ccba2023-03-29 18:56:28 -0600[diff] [blame]3#include <baseboard/variants.h>
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]4#include <console/console.h>
5#include <fw_config.h>
Jon Murphy462ccba2023-03-29 18:56:28 -0600[diff] [blame]6#include <gpio.h>
Jon Murphya8590572023-02-23 13:42:52 -0700[diff] [blame]7#include <soc/platform_descriptors.h>
8#include <types.h>
9
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]10static fsp_dxio_descriptor myst_dxio_descriptors[] = {
11 [DXIO_WWAN] = {
Jon Murphy462ccba2023-03-29 18:56:28 -0600[diff] [blame]12 .engine_type = UNUSED_ENGINE,
13 .port_present = true,
14 .start_logical_lane = 13,
15 .end_logical_lane = 13,
16 .device_number = PCI_SLOT(WWAN_DEVFN),
17 .function_number = PCI_FUNC(WWAN_DEVFN),
18 .link_speed_capability = GEN3,
19 .turn_off_unused_lanes = true,
20 .clk_req = CLK_REQ2,
21 },
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]22 [DXIO_WLAN] = {
Jon Murphy462ccba2023-03-29 18:56:28 -0600[diff] [blame]23 .engine_type = PCIE_ENGINE,
24 .port_present = true,
25 .start_logical_lane = 14,
26 .end_logical_lane = 14,
27 .device_number = PCI_SLOT(WLAN_DEVFN),
28 .function_number = PCI_FUNC(WLAN_DEVFN),
29 .link_speed_capability = GEN3,
30 .turn_off_unused_lanes = true,
31 .clk_req = CLK_REQ0,
32 },
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]33 [DXIO_SD] = {
Jon Murphy462ccba2023-03-29 18:56:28 -0600[diff] [blame]34 .engine_type = PCIE_ENGINE,
35 .port_present = true,
36 .start_logical_lane = 15,
37 .end_logical_lane = 15,
38 .device_number = PCI_SLOT(SD_DEVFN),
39 .function_number = PCI_FUNC(SD_DEVFN),
40 .link_speed_capability = GEN1,
41 .turn_off_unused_lanes = true,
42 .link_hotplug = 3,
43 .clk_req = CLK_REQ1,
44 },
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]45 [DXIO_STORAGE] = { 0 },
46};
47
48static const fsp_dxio_descriptor emmc_descriptor = {
49 .engine_type = PCIE_ENGINE,
50 .port_present = true,
51 .start_logical_lane = 16,
52 .end_logical_lane = 16,
53 .device_number = PCI_SLOT(NVME_DEVFN),
54 .function_number = PCI_FUNC(NVME_DEVFN),
55 .link_speed_capability = GEN_MAX,
56 .turn_off_unused_lanes = true,
Jon Murphyba5a2a12023-06-01 14:40:37 -0600[diff] [blame^]57 /* TODO(b/284213391): Fix PCIe shutdown */
58 .link_hotplug = 3,
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]59 .clk_req = CLK_REQ3,
60};
61
62static const fsp_dxio_descriptor nvme_descriptor = {
63 .engine_type = PCIE_ENGINE,
64 .port_present = true,
65 .start_logical_lane = 16,
66 .end_logical_lane = 19,
67 .device_number = PCI_SLOT(NVME_DEVFN),
68 .function_number = PCI_FUNC(NVME_DEVFN),
69 .link_speed_capability = GEN_MAX,
70 .turn_off_unused_lanes = true,
Jon Murphyba5a2a12023-06-01 14:40:37 -0600[diff] [blame^]71 /* TODO(b/284213391): Fix PCIe shutdown */
72 .link_hotplug = 3,
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]73 .clk_req = CLK_REQ3,
Jon Murphy462ccba2023-03-29 18:56:28 -0600[diff] [blame]74};
75
76static const fsp_ddi_descriptor myst_ddi_descriptors[] = {
77 { /* DDI0 - eDP */
78 .connector_type = DDI_EDP,
79 .aux_index = DDI_AUX1,
80 .hdp_index = DDI_HDP1
81 },
82 { /* DDI1 - HDMI/DP */
83 .connector_type = DDI_HDMI,
84 .aux_index = DDI_AUX2,
85 .hdp_index = DDI_HDP2
86 },
87 { /* DDI2 - DP (type C) */
88 .connector_type = DDI_DP_W_TYPEC,
89 .aux_index = DDI_AUX3,
90 .hdp_index = DDI_HDP3,
91 },
92 { /* DDI3 - DP (type C) */
93 .connector_type = DDI_DP_W_TYPEC,
94 .aux_index = DDI_AUX4,
95 .hdp_index = DDI_HDP4,
96 },
97 { /* DDI4 - Unused */
98 .connector_type = DDI_UNUSED_TYPE,
99 .aux_index = DDI_AUX5,
100 .hdp_index = DDI_HDP5,
101 },
102};
103
Jon Murphya8590572023-02-23 13:42:52 -0700[diff] [blame]104void mainboard_get_dxio_ddi_descriptors(
105 const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
106 const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num)
107{
Jon Murphyc20afb82023-05-03 20:48:26 -0600[diff] [blame]108 if (fw_config_is_provisioned() && fw_config_probe(FW_CONFIG(STORAGE, NVME))) {
109 printk(BIOS_DEBUG, "Enabling NVMe.\n");
110 myst_dxio_descriptors[DXIO_STORAGE] = nvme_descriptor;
111 } else {
112 printk(BIOS_DEBUG, "Enabling eMMC.\n");
113 myst_dxio_descriptors[DXIO_STORAGE] = emmc_descriptor;
114 }
115
Jon Murphy462ccba2023-03-29 18:56:28 -0600[diff] [blame]116 *dxio_descs = myst_dxio_descriptors;
117 *dxio_num = ARRAY_SIZE(myst_dxio_descriptors);
118 *ddi_descs = myst_ddi_descriptors;
119 *ddi_num = ARRAY_SIZE(myst_ddi_descriptors);
Jon Murphya8590572023-02-23 13:42:52 -0700[diff] [blame]120}