Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /** |
| 2 | * @file |
| 3 | * |
| 4 | * Southbridge CIMx Function Support Define (All) |
| 5 | * |
| 6 | * |
| 7 | * |
| 8 | * @xrefitem bom "File Content Label" "Release Content" |
| 9 | * @e project: CIMx-SB |
| 10 | * @e sub-project: |
| 11 | * @e \$Revision:$ @e \$Date:$ |
| 12 | * |
| 13 | */ |
| 14 | /* |
| 15 | ***************************************************************************** |
| 16 | * |
| 17 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 18 | * All rights reserved. |
Edward O'Callaghan | b9a6700 | 2014-07-06 19:29:03 +1000 | [diff] [blame^] | 19 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 20 | * Redistribution and use in source and binary forms, with or without |
| 21 | * modification, are permitted provided that the following conditions are met: |
| 22 | * * Redistributions of source code must retain the above copyright |
| 23 | * notice, this list of conditions and the following disclaimer. |
| 24 | * * Redistributions in binary form must reproduce the above copyright |
| 25 | * notice, this list of conditions and the following disclaimer in the |
| 26 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | b9a6700 | 2014-07-06 19:29:03 +1000 | [diff] [blame^] | 27 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 28 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 29 | * from this software without specific prior written permission. |
Edward O'Callaghan | b9a6700 | 2014-07-06 19:29:03 +1000 | [diff] [blame^] | 30 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 31 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 32 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 33 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 34 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 35 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 36 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 37 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 38 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 39 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 40 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | b9a6700 | 2014-07-06 19:29:03 +1000 | [diff] [blame^] | 41 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 42 | * *************************************************************************** |
| 43 | * |
| 44 | */ |
| 45 | |
| 46 | // Southbridge SBMAIN Routines |
| 47 | |
| 48 | /** |
| 49 | * Southbridge Main Function Public Function |
| 50 | * |
| 51 | */ |
| 52 | |
| 53 | /** |
| 54 | * sbBeforePciInit - Config Southbridge before PCI emulation |
| 55 | * |
| 56 | * |
| 57 | * |
| 58 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 59 | * |
| 60 | */ |
| 61 | void sbBeforePciInit (IN AMDSBCFG* pConfig); |
| 62 | |
| 63 | |
| 64 | /** |
| 65 | * sbAfterPciInit - Config Southbridge after PCI emulation |
| 66 | * |
| 67 | * |
| 68 | * |
| 69 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 70 | * |
| 71 | */ |
| 72 | void sbAfterPciInit (IN AMDSBCFG* pConfig); |
| 73 | |
| 74 | /** |
| 75 | * sbMidPostInit - Config Southbridge during middle of POST |
| 76 | * |
| 77 | * |
| 78 | * |
| 79 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 80 | * |
| 81 | */ |
| 82 | void sbMidPostInit (IN AMDSBCFG* pConfig); |
| 83 | |
| 84 | /** |
| 85 | * sbLatePost - Prepare Southbridge to boot to OS. |
| 86 | * |
| 87 | * |
| 88 | * |
| 89 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 90 | * |
| 91 | */ |
| 92 | void sbLatePost (IN AMDSBCFG* pConfig); |
| 93 | |
| 94 | /** |
| 95 | * sbBeforePciRestoreInit - Config Southbridge before ACPI S3 resume PCI config device restore |
| 96 | * |
| 97 | * |
| 98 | * |
| 99 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 100 | * |
| 101 | */ |
| 102 | void sbBeforePciRestoreInit (IN AMDSBCFG* pConfig); |
| 103 | |
| 104 | /** |
| 105 | * sbAfterPciRestoreInit - Config Southbridge after ACPI S3 resume PCI config device restore |
| 106 | * |
| 107 | * |
| 108 | * |
| 109 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 110 | * |
| 111 | */ |
| 112 | void sbAfterPciRestoreInit (IN AMDSBCFG* pConfig); |
| 113 | |
| 114 | /** |
| 115 | * sbSmmAcpiOn - Config Southbridge during ACPI_ON |
| 116 | * |
| 117 | * |
| 118 | * |
| 119 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 120 | * |
| 121 | */ |
| 122 | void sbSmmAcpiOn (IN AMDSBCFG* pConfig); |
| 123 | |
| 124 | /** |
| 125 | * CallBackToOEM - Call Back routine. |
| 126 | * |
| 127 | * |
| 128 | * |
| 129 | * @param[in] Func Callback ID. |
| 130 | * @param[in] Data Callback specific data. |
| 131 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 132 | */ |
| 133 | unsigned int CallBackToOEM (IN unsigned int Func, IN unsigned int Data, IN AMDSBCFG* pConfig); |
| 134 | |
| 135 | |
| 136 | // Southbridge SBPOR Routines |
| 137 | |
| 138 | /** |
| 139 | * Southbridge power-on initial Public Function |
| 140 | * |
| 141 | */ |
| 142 | |
| 143 | /** |
| 144 | * sbPowerOnInit - Config Southbridge during power on stage. |
| 145 | * |
| 146 | * |
| 147 | * |
| 148 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 149 | * |
| 150 | */ |
| 151 | void sbPowerOnInit (IN AMDSBCFG* pConfig); |
| 152 | |
| 153 | |
| 154 | // Southbridge Common Routines |
| 155 | |
| 156 | /** |
| 157 | * Southbridge Common Public Function |
| 158 | * |
| 159 | */ |
| 160 | |
| 161 | /** |
| 162 | * commonInitEarlyBoot - Config Southbridge SMBUS/ACPI/IDE/LPC/PCIB. |
| 163 | * |
| 164 | * This settings should be done during S3 resume also |
| 165 | * |
| 166 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 167 | * |
| 168 | */ |
| 169 | void commonInitEarlyBoot (IN AMDSBCFG* pConfig); |
| 170 | |
| 171 | /** |
| 172 | * commonInitEarlyPost - Config Southbridge SMBUS/ACPI/IDE/LPC/PCIB. |
| 173 | * |
| 174 | * This settings might not program during S3 resume |
| 175 | * |
| 176 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 177 | * |
| 178 | */ |
| 179 | void commonInitEarlyPost (IN AMDSBCFG* pConfig); |
| 180 | |
| 181 | /** |
| 182 | * commonInitLateBoot - Prepare Southbridge register setting to boot to OS. |
| 183 | * |
| 184 | * |
| 185 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 186 | * |
| 187 | */ |
| 188 | void commonInitLateBoot (IN AMDSBCFG* pConfig); |
| 189 | |
| 190 | /** |
| 191 | * abSpecialSetBeforePciEnum - Special setting ABCFG registers before PCI emulation. |
| 192 | * |
| 193 | * |
| 194 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 195 | * |
| 196 | */ |
| 197 | void abSpecialSetBeforePciEnum (IN AMDSBCFG* pConfig); |
| 198 | |
| 199 | void usbSetPllDuringS3 (IN AMDSBCFG* pConfig); |
| 200 | void usbDesertPll (IN AMDSBCFG* pConfig); |
| 201 | |
| 202 | /** |
| 203 | * hpetInit - Program Southbridge HPET function |
| 204 | * |
| 205 | * ** Eric |
| 206 | * |
| 207 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 208 | * @param[in] pStaticOptions Platform build configuration table. |
| 209 | * |
| 210 | */ |
| 211 | void hpetInit (IN AMDSBCFG* pConfig, IN BUILDPARAM *pStaticOptions); |
| 212 | |
| 213 | /** |
| 214 | * c3PopupSetting - Program Southbridge C state function |
| 215 | * |
| 216 | * ** Eric |
| 217 | * |
| 218 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 219 | * |
| 220 | */ |
| 221 | void c3PopupSetting (IN AMDSBCFG* pConfig); |
| 222 | |
| 223 | /** |
| 224 | * FusionRelatedSetting - Program Fusion C related function |
| 225 | * |
| 226 | * |
| 227 | * |
| 228 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 229 | * |
| 230 | */ |
| 231 | void FusionRelatedSetting (IN AMDSBCFG* pConfig); |
| 232 | |
| 233 | /** |
| 234 | * Southbridge Common Private Function |
| 235 | * |
| 236 | */ |
| 237 | |
| 238 | /** |
| 239 | * abLinkInitBeforePciEnum - Set ABCFG registers before PCI emulation. |
| 240 | * |
| 241 | * |
| 242 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 243 | * |
| 244 | */ |
| 245 | void abLinkInitBeforePciEnum (IN AMDSBCFG* pConfig); |
| 246 | |
| 247 | // Southbridge SATA Routines |
| 248 | |
| 249 | /** |
| 250 | * Southbridge SATA Controller Public Function |
| 251 | * |
| 252 | */ |
| 253 | |
| 254 | /** |
| 255 | * sataInitMidPost - Config SATA controller in Middle POST. |
| 256 | * |
| 257 | * |
| 258 | * |
| 259 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 260 | * |
| 261 | */ |
| 262 | void sataInitMidPost (IN AMDSBCFG* pConfig); |
| 263 | |
| 264 | /** |
| 265 | * sataInitAfterPciEnum - Config SATA controller after PCI emulation |
| 266 | * |
| 267 | * |
| 268 | * |
| 269 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 270 | * |
| 271 | */ |
| 272 | void sataInitAfterPciEnum (IN AMDSBCFG* pConfig); |
| 273 | |
| 274 | /** |
| 275 | * sataInitBeforePciEnum - Config SATA controller before PCI emulation |
| 276 | * |
| 277 | * |
| 278 | * |
| 279 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 280 | * |
| 281 | */ |
| 282 | void sataInitBeforePciEnum (IN AMDSBCFG* pConfig); |
| 283 | |
| 284 | /** |
| 285 | * sataInitLatePost - Prepare SATA controller to boot to OS. |
| 286 | * |
| 287 | * - Set class ID to AHCI (if set to AHCI * Mode) |
| 288 | * - Enable AHCI interrupt |
| 289 | * |
| 290 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 291 | * |
| 292 | */ |
| 293 | void sataInitLatePost (IN AMDSBCFG* pConfig); |
| 294 | |
| 295 | // Southbridge GEC Routines |
| 296 | |
| 297 | /** |
| 298 | * Southbridge GEC Controller Public Function |
| 299 | * |
| 300 | */ |
| 301 | |
| 302 | /** |
| 303 | * gecInitBeforePciEnum - Config GEC controller before PCI emulation |
| 304 | * |
| 305 | * |
| 306 | * |
| 307 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 308 | * |
| 309 | */ |
| 310 | void gecInitBeforePciEnum (IN AMDSBCFG* pConfig); |
| 311 | |
| 312 | /** |
| 313 | * gecInitAfterPciEnum - Config GEC controller after PCI emulation |
| 314 | * |
| 315 | * |
| 316 | * |
| 317 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 318 | * |
| 319 | */ |
| 320 | void gecInitAfterPciEnum (IN AMDSBCFG* pConfig); |
| 321 | |
| 322 | /** |
| 323 | * gecInitLatePost - Prepare GEC controller to boot to OS. |
| 324 | * |
| 325 | * |
| 326 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 327 | * |
| 328 | */ |
| 329 | void gecInitLatePost (IN AMDSBCFG* pConfig); |
| 330 | |
| 331 | // Southbridge USB Routines |
| 332 | |
| 333 | /** |
| 334 | * Southbridge USB Controller Public Function |
| 335 | * |
| 336 | */ |
| 337 | |
| 338 | /** |
| 339 | * Config USB controller before PCI emulation |
| 340 | * |
| 341 | * |
| 342 | * |
| 343 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 344 | * |
| 345 | */ |
| 346 | void usbInitBeforePciEnum (IN AMDSBCFG* pConfig); |
| 347 | |
| 348 | /** |
| 349 | * Config USB controller after PCI emulation |
| 350 | * |
| 351 | * |
| 352 | * |
| 353 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 354 | * |
| 355 | */ |
| 356 | void usbInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 357 | |
| 358 | /** |
| 359 | * Config USB1 EHCI controller after PCI emulation |
| 360 | * |
| 361 | * |
| 362 | * |
| 363 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 364 | * |
| 365 | */ |
| 366 | void usb1EhciInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 367 | void usb2EhciInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 368 | void usb3EhciInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 369 | void usb1OhciInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 370 | void usb2OhciInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 371 | void usb3OhciInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 372 | void usb4OhciInitAfterPciInit (IN AMDSBCFG* pConfig); |
| 373 | |
| 374 | // Southbridge SMI Service Routines (SMM.C) |
| 375 | |
| 376 | /** |
| 377 | * Southbridge SMI Service Routines Public Function |
| 378 | * |
| 379 | */ |
| 380 | |
| 381 | /** |
| 382 | * Southbridge SMI service module |
| 383 | * |
| 384 | * |
| 385 | * |
| 386 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 387 | * |
| 388 | */ |
| 389 | void sbSmmService (IN AMDSBCFG* pConfig); |
| 390 | |
| 391 | /** |
| 392 | * softwareSMIservice - Software SMI service |
| 393 | * |
| 394 | * ** Eric |
| 395 | * |
| 396 | * @param[in] void Southbridge software SMI service ID. |
| 397 | * |
| 398 | */ |
| 399 | void softwareSMIservice (IN void); |
| 400 | |
| 401 | // Southbridge GPP Controller Routines |
| 402 | |
| 403 | /** |
| 404 | * Southbridge GPP Controller Routines Public Function |
| 405 | * |
| 406 | */ |
| 407 | |
| 408 | /** |
| 409 | * GPP early programming and link training. On exit all populated EPs should be fully operational. |
| 410 | * |
| 411 | * |
| 412 | * |
| 413 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 414 | * |
| 415 | */ |
| 416 | void sbPcieGppEarlyInit (IN AMDSBCFG* pConfig); |
| 417 | |
| 418 | /** |
| 419 | * sbPcieGppLateInit - Late PCIE initialization for SB800 GPP component |
| 420 | * |
| 421 | * |
| 422 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 423 | * |
| 424 | */ |
| 425 | void sbPcieGppLateInit (IN AMDSBCFG* pConfig); |
| 426 | |
| 427 | // Southbridge HD Controller Routines (AZALIA.C) |
| 428 | |
| 429 | /** |
| 430 | * Southbridge HD Controller Routines (AZALIA.C) Public Function |
| 431 | * |
| 432 | */ |
| 433 | |
| 434 | /** |
| 435 | * Config HD Audio Before PCI emulation |
| 436 | * |
| 437 | * |
| 438 | * |
| 439 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 440 | * |
| 441 | */ |
| 442 | void azaliaInitBeforePciEnum (IN AMDSBCFG* pConfig); |
| 443 | |
| 444 | /** |
| 445 | * Config HD Audio after PCI emulation |
| 446 | * |
| 447 | * |
| 448 | * |
| 449 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 450 | * |
| 451 | */ |
| 452 | void azaliaInitAfterPciEnum (IN AMDSBCFG* pConfig); |
| 453 | |
| 454 | |
| 455 | // Southbridge EC Routines |
| 456 | |
| 457 | #ifndef NO_EC_SUPPORT |
| 458 | /** |
| 459 | * Southbridge EC Controller Public Function |
| 460 | * |
| 461 | */ |
| 462 | |
| 463 | /** |
| 464 | * Config EC controller during power-on |
| 465 | * |
| 466 | * |
| 467 | * |
| 468 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 469 | * |
| 470 | */ |
| 471 | void ecPowerOnInit (IN AMDSBCFG* pConfig); |
| 472 | |
| 473 | /** |
| 474 | * Config EC controller before PCI emulation |
| 475 | * |
| 476 | * |
| 477 | * |
| 478 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 479 | * |
| 480 | */ |
| 481 | void ecInitBeforePciEnum (IN AMDSBCFG* pConfig); |
| 482 | |
| 483 | /** |
| 484 | * Prepare EC controller to boot to OS. |
| 485 | * |
| 486 | * |
| 487 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 488 | * |
| 489 | */ |
| 490 | void ecInitLatePost (IN AMDSBCFG* pConfig); |
| 491 | |
| 492 | /** |
| 493 | * validateImcFirmware - Validate IMC Firmware. |
| 494 | * |
| 495 | * |
| 496 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 497 | * |
| 498 | * @retval TRUE Pass |
| 499 | * @retval FALSE Failed |
| 500 | */ |
| 501 | unsigned char validateImcFirmware (IN AMDSBCFG* pConfig); |
| 502 | |
| 503 | /** |
| 504 | * validateImcFirmware - Validate IMC Firmware. |
| 505 | * |
| 506 | * |
| 507 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 508 | * |
| 509 | */ |
| 510 | void softwareToggleImcStrapping (IN AMDSBCFG* pConfig); |
| 511 | #endif |
| 512 | |
| 513 | #ifndef NO_HWM_SUPPORT |
| 514 | /** |
| 515 | * validateImcFirmware - Validate IMC Firmware. |
| 516 | * |
| 517 | * |
| 518 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 519 | * |
| 520 | */ |
| 521 | void hwmInit (IN AMDSBCFG* pConfig); |
| 522 | #endif |
| 523 | |