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Raul E Rangel899be1b2021-02-05 15:50:20 -07001/* SPDX-License-Identifier: GPL-2.0-only */
2
Felix Held6e2f5f22021-02-08 18:16:07 +01003#include <amdblocks/memmap.h>
Felix Helda90854d2021-02-10 04:05:27 +01004#include <amdblocks/smm.h>
Felix Held556373e2024-03-22 16:16:18 +01005#include <arch/vga.h>
Raul E Rangel899be1b2021-02-05 15:50:20 -07006#include <console/console.h>
7#include <cbmem.h>
Felix Held6e2f5f22021-02-08 18:16:07 +01008#include <cpu/x86/smm.h>
Felix Held556373e2024-03-22 16:16:18 +01009#include <device/device.h>
Felix Held6e2f5f22021-02-08 18:16:07 +010010#include <memrange.h>
Felix Held3aa757d2021-04-21 21:10:39 +020011#include <types.h>
Raul E Rangel899be1b2021-02-05 15:50:20 -070012
13void memmap_stash_early_dram_usage(void)
14{
15 struct memmap_early_dram *e;
16
17 e = cbmem_add(CBMEM_ID_CB_EARLY_DRAM, sizeof(*e));
18
19 if (!e)
20 die("ERROR: Failed to stash early dram usage!\n");
21
22 e->base = (uint32_t)(uintptr_t)_early_reserved_dram;
23 e->size = REGION_SIZE(early_reserved_dram);
24}
25
Felix Held556373e2024-03-22 16:16:18 +010026static const struct memmap_early_dram *memmap_get_early_dram_usage(void)
Raul E Rangel899be1b2021-02-05 15:50:20 -070027{
28 struct memmap_early_dram *e = cbmem_find(CBMEM_ID_CB_EARLY_DRAM);
29
30 if (!e)
31 die("ERROR: Failed to read early dram usage!\n");
32
33 return e;
34}
Felix Held6e2f5f22021-02-08 18:16:07 +010035
Felix Held556373e2024-03-22 16:16:18 +010036/* report SoC memory map up to cbmem_top */
37void read_lower_soc_memmap_resources(struct device *dev, unsigned long *idx)
38{
Felix Held83874002024-03-22 17:12:50 +010039 const uint32_t mem_usable = (uintptr_t)cbmem_top();
Felix Held556373e2024-03-22 16:16:18 +010040 const struct memmap_early_dram *e = memmap_get_early_dram_usage();
Felix Held83874002024-03-22 17:12:50 +010041 const uintptr_t early_reserved_dram_start = e->base;
42 const uintptr_t early_reserved_dram_end = e->base + e->size;
Felix Held556373e2024-03-22 16:16:18 +010043
44 /* 0x0 - 0x9ffff */
Felix Heldb985cc02024-03-22 16:30:08 +010045 ram_range(dev, (*idx)++, 0, VGA_MMIO_BASE);
Felix Held556373e2024-03-22 16:16:18 +010046
47 /* 0xa0000 - 0xbffff: legacy VGA */
48 mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
49
50 /* 0xc0000 - 0xfffff: Option ROM */
Felix Heldb985cc02024-03-22 16:30:08 +010051 reserved_ram_from_to(dev, (*idx)++, VGA_MMIO_BASE + VGA_MMIO_SIZE, 1 * MiB);
Felix Held556373e2024-03-22 16:16:18 +010052
53 /* 1MiB - bottom of DRAM reserved for early coreboot usage */
54 ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
55
56 /* DRAM reserved for early coreboot usage */
57 reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
58
59 /*
60 * top of DRAM consumed early - low top usable RAM
61 * cbmem_top() accounts for low UMA and TSEG if they are used.
62 */
63 ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
64}
65
Felix Held6e2f5f22021-02-08 18:16:07 +010066void smm_region(uintptr_t *start, size_t *size)
67{
68 static int once;
Felix Held6e2f5f22021-02-08 18:16:07 +010069
Felix Held2cb2b182023-07-26 17:53:24 +020070 if (CONFIG(PLATFORM_USES_FSP2_0)) {
71 fsp_get_smm_region(start, size);
72 } else {
73 *start = (uintptr_t)cbmem_top();
74 *size = CONFIG_SMM_TSEG_SIZE;
75 }
Felix Held6e2f5f22021-02-08 18:16:07 +010076
77 if (!once) {
78 clear_tvalid();
79 once = 1;
80 }
81}