| Gerd Hoffmann | ee941b38 | 2013-06-07 16:03:44 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2004 Stefan Reinauer <stefan.reinauer@coreboot.org> |
| 5 | * Copyright (C) 2010 Kevin O'Connor <kevin@koconnor.net> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <device/pci_ids.h> |
| 24 | #include <device/pci_ops.h> |
| 25 | #include <pc80/keyboard.h> |
| 26 | #include <arch/io.h> |
| 27 | #include <console/console.h> |
| 28 | |
| 29 | #define Q35_PAM0 0x90 |
| Gerd Hoffmann | ee941b38 | 2013-06-07 16:03:44 +0200 | [diff] [blame] | 30 | |
| 31 | static const unsigned char qemu_q35_irqs[] = { |
| 32 | 10, 10, 11, 11, |
| 33 | 10, 10, 11, 11, |
| 34 | }; |
| 35 | |
| 36 | static void qemu_nb_init(device_t dev) |
| 37 | { |
| 38 | /* Map memory at 0xc0000 - 0xfffff */ |
| 39 | int i; |
| 40 | uint8_t v = pci_read_config8(dev, Q35_PAM0); |
| 41 | v |= 0x30; |
| 42 | pci_write_config8(dev, Q35_PAM0, v); |
| 43 | pci_write_config8(dev, Q35_PAM0 + 1, 0x33); |
| 44 | pci_write_config8(dev, Q35_PAM0 + 2, 0x33); |
| 45 | pci_write_config8(dev, Q35_PAM0 + 3, 0x33); |
| 46 | pci_write_config8(dev, Q35_PAM0 + 4, 0x33); |
| 47 | pci_write_config8(dev, Q35_PAM0 + 5, 0x33); |
| 48 | pci_write_config8(dev, Q35_PAM0 + 6, 0x33); |
| 49 | |
| 50 | /* This sneaked in here, because Qemu does not |
| 51 | * emulate a SuperIO chip |
| 52 | */ |
| 53 | pc_keyboard_init(0); |
| 54 | |
| 55 | /* setup IRQ routing for pci slots */ |
| 56 | for (i = 0; i < 25; i++) |
| 57 | pci_assign_irqs(0, i, qemu_q35_irqs + (i % 4)); |
| 58 | /* setup IRQ routing southbridge devices */ |
| 59 | for (i = 25; i < 32; i++) |
| 60 | pci_assign_irqs(0, i, qemu_q35_irqs); |
| Gerd Hoffmann | ee941b38 | 2013-06-07 16:03:44 +0200 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | static void qemu_nb_read_resources(struct device *dev) |
| 64 | { |
| 65 | pci_dev_read_resources(dev); |
| 66 | |
| 67 | /* reserve mmconfig */ |
| Kyösti Mälkki | b9646a2 | 2013-07-03 08:06:32 +0300 | [diff] [blame^] | 68 | fixed_mem_resource(dev, 2, CONFIG_MMCONF_BASE_ADDRESS >> 10, 0x10000000 >> 10, |
| Gerd Hoffmann | ee941b38 | 2013-06-07 16:03:44 +0200 | [diff] [blame] | 69 | IORESOURCE_RESERVE); |
| 70 | } |
| 71 | |
| 72 | |
| 73 | static struct device_operations nb_operations = { |
| 74 | .read_resources = qemu_nb_read_resources, |
| 75 | .set_resources = pci_dev_set_resources, |
| 76 | .enable_resources = pci_dev_enable_resources, |
| 77 | .init = qemu_nb_init, |
| 78 | .ops_pci = 0, |
| 79 | }; |
| 80 | |
| 81 | static const struct pci_driver nb_driver __pci_driver = { |
| 82 | .ops = &nb_operations, |
| 83 | .vendor = 0x8086, |
| 84 | .device = 0x29c0, |
| 85 | }; |