Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2006 AMD |
| 5 | * Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
| 6 | * |
| 7 | * Copyright (C) 2006 MSI |
| 8 | * Written by Bingxun Shi <bingxunshi@gmail.com> for MSI. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 23 | */ |
| 24 | |
| 25 | #include <console/console.h> |
| 26 | #include <arch/smp/mpspec.h> |
| 27 | #include <device/pci.h> |
| 28 | #include <string.h> |
| 29 | #include <stdint.h> |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 30 | #include <cpu/amd/amdk8_sysconf.h> |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 31 | #include "mb_sysconf.h" |
| 32 | |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 33 | static void *smp_write_config_table(void *v) |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 34 | { |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 35 | struct mp_config_table *mc; |
Stefan Reinauer | f8b1923 | 2010-04-07 00:38:09 +0000 | [diff] [blame] | 36 | struct mb_sysconf_t *m; |
| 37 | unsigned sbdn; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 38 | |
Stefan Reinauer | f8b1923 | 2010-04-07 00:38:09 +0000 | [diff] [blame] | 39 | int i,j; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 40 | |
| 41 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 42 | |
Uwe Hermann | 55dc223 | 2010-10-25 15:32:07 +0000 | [diff] [blame] | 43 | mptable_init(mc, "MS-9282 ", LAPIC_ADDR); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 44 | |
| 45 | smp_write_processors(mc); |
| 46 | |
| 47 | get_bus_conf(); |
| 48 | sbdn = sysconf.sbdn; |
| 49 | m = sysconf.mb; |
| 50 | |
| 51 | /*Bus: Bus ID Type*/ |
| 52 | /* define bus and isa numbers */ |
| 53 | for(j= 0; j < 256 ; j++) { |
| 54 | if(m->bus_type[j]) |
| 55 | smp_write_bus(mc, j, "PCI "); |
| 56 | } |
| 57 | smp_write_bus(mc, m->bus_isa, "ISA "); |
| 58 | |
| 59 | /*I/O APICs: APIC ID Version State Address*/ |
| 60 | { |
| 61 | device_t dev; |
| 62 | struct resource *res; |
| 63 | uint32_t dword; |
| 64 | |
| 65 | dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); |
| 66 | if (dev) { |
| 67 | res = find_resource(dev, PCI_BASE_ADDRESS_1); |
| 68 | if (res) { |
| 69 | smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base); |
| 70 | } |
| 71 | |
| 72 | dword = 0x43c6c643; |
| 73 | pci_write_config32(dev, 0x7c, dword); |
| 74 | |
| 75 | dword = 0x81001a00; |
| 76 | pci_write_config32(dev, 0x80, dword); |
| 77 | |
| 78 | dword = 0xd00002d2; |
| 79 | pci_write_config32(dev, 0x84, dword); |
| 80 | |
| 81 | } |
| 82 | |
| 83 | |
| 84 | } |
| 85 | |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 86 | mptable_add_isa_interrupts(mc, m->bus_isa, m->apicid_mcp55, 0); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 87 | |
| 88 | //SMBUS |
| 89 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0xa); |
| 90 | |
| 91 | //USB1.1 |
| 92 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|0, m->apicid_mcp55, 0x16); // 22 |
| 93 | |
| 94 | //USB2.0 |
| 95 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|1, m->apicid_mcp55, 0x17); // 23 |
| 96 | |
| 97 | //SATA1 |
| 98 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|0, m->apicid_mcp55, 0x14); // 20 |
| 99 | |
| 100 | //SATA2 |
| 101 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|1, m->apicid_mcp55, 0x17); // 23 |
| 102 | |
| 103 | //SATA3 |
| 104 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|2, m->apicid_mcp55, 0x15); // 21 |
| 105 | |
| 106 | //NIC1 |
| 107 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+8)<<2)|0, m->apicid_mcp55, 0x16); // 22 |
| 108 | //NIC2 |
| 109 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+9)<<2)|0, m->apicid_mcp55, 0x15); // 21 |
| 110 | |
| 111 | for(j=7; j>=2; j--) { |
| 112 | if(!m->bus_mcp55[j]) continue; |
| 113 | for(i=0;i<4;i++) { |
| 114 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[j], (0x00<<2)|i, m->apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4); |
| 115 | } |
| 116 | } |
| 117 | |
| 118 | for(j=0; j<1; j++) |
| 119 | for(i=0;i<4;i++) { |
| 120 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[1], ((0x04+j)<<2)|i, m->apicid_mcp55, 0x10 + (2+i+j)%4); |
| 121 | } |
| 122 | |
| 123 | /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |
Tobias Diedrich | b907d32 | 2010-10-26 22:40:16 +0000 | [diff] [blame^] | 124 | smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x0); |
| 125 | smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, MP_APIC_ALL, 0x1); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 126 | /* There is no extension information... */ |
| 127 | |
| 128 | /* Compute the checksums */ |
| 129 | mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); |
| 130 | mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 131 | printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 132 | mc, smp_next_mpe_entry(mc)); |
| 133 | return smp_next_mpe_entry(mc); |
| 134 | } |
| 135 | |
| 136 | unsigned long write_smp_table(unsigned long addr) |
| 137 | { |
| 138 | void *v; |
| 139 | v = smp_write_floating_table(addr); |
| 140 | return (unsigned long)smp_write_config_table(v); |
| 141 | } |