Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007 AMD |
| 5 | * Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 6 | * Copyright (C) 2009 Harald Gutmann <harald.gutmann@gmx.net> |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 21 | */ |
| 22 | |
| 23 | #include <console/console.h> |
| 24 | #include <arch/smp/mpspec.h> |
| 25 | #include <device/pci.h> |
| 26 | #include <string.h> |
| 27 | #include <stdint.h> |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 28 | #include <cpu/amd/amdk8_sysconf.h> |
Uwe Hermann | 55dc223 | 2010-10-25 15:32:07 +0000 | [diff] [blame] | 29 | |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 30 | extern unsigned char bus_isa; |
| 31 | extern unsigned char bus_mcp55[8]; //1 |
| 32 | |
| 33 | extern unsigned apicid_mcp55; |
| 34 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 35 | extern unsigned bus_type[256]; |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 36 | |
Myles Watson | 08e0fb8 | 2010-03-22 16:33:25 +0000 | [diff] [blame] | 37 | static void *smp_write_config_table(void *v) |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 38 | { |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 39 | struct mp_config_table *mc; |
| 40 | unsigned sbdn; |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 41 | int i,j,k; |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 42 | |
| 43 | mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 44 | |
Uwe Hermann | 55dc223 | 2010-10-25 15:32:07 +0000 | [diff] [blame] | 45 | mptable_init(mc, "GA-M57SLI-S4", LAPIC_ADDR); |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 46 | |
| 47 | smp_write_processors(mc); |
| 48 | |
| 49 | get_bus_conf(); |
| 50 | sbdn = sysconf.sbdn; |
| 51 | |
| 52 | /*Bus: Bus ID Type*/ |
| 53 | /* define bus and isa numbers */ |
| 54 | for(j= 0; j < 256 ; j++) { |
| 55 | if(bus_type[j]) |
| 56 | smp_write_bus(mc, j, "PCI "); |
| 57 | } |
| 58 | smp_write_bus(mc, bus_isa, "ISA "); |
| 59 | |
| 60 | /*I/O APICs: APIC ID Version State Address*/ |
| 61 | { |
| 62 | device_t dev; |
| 63 | struct resource *res; |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 64 | |
| 65 | dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); |
| 66 | if (dev) { |
| 67 | res = find_resource(dev, PCI_BASE_ADDRESS_1); |
| 68 | if (res) { |
| 69 | smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base); |
| 70 | } |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 71 | /* set up the interrupt registers of mcp55 */ |
| 72 | pci_write_config32(dev, 0x7c, 0xc643c643); |
| 73 | pci_write_config32(dev, 0x80, 0x8da01009); |
| 74 | pci_write_config32(dev, 0x84, 0x200018d2); |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 75 | } |
| 76 | } |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 77 | |
Patrick Georgi | c5b87c8 | 2010-05-20 15:28:19 +0000 | [diff] [blame] | 78 | mptable_add_isa_interrupts(mc, bus_isa, apicid_mcp55, 0); |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 79 | |
Torsten Duwe | f4c57a9 | 2008-01-07 11:13:16 +0000 | [diff] [blame] | 80 | /* PCI interrupts are level triggered, and are |
| 81 | * associated with a specific bus/device/function tuple. |
| 82 | */ |
| 83 | #define PCI_INT(bus, dev, fn, pin) \ |
| 84 | smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\ |
| 85 | bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin)) |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 86 | |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 87 | PCI_INT(0,sbdn+1,1, 10); /* SMBus */ |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 88 | PCI_INT(0,sbdn+2,0, 22); /* USB */ |
| 89 | PCI_INT(0,sbdn+2,1, 23); /* USB */ |
| 90 | PCI_INT(0,sbdn+4,0, 21); /* IDE */ |
| 91 | PCI_INT(0,sbdn+5,0, 20); /* SATA */ |
| 92 | PCI_INT(0,sbdn+5,1, 21); /* SATA */ |
| 93 | PCI_INT(0,sbdn+5,2, 22); /* SATA */ |
| 94 | PCI_INT(0,sbdn+6,1, 23); /* HD Audio */ |
| 95 | PCI_INT(0,sbdn+8,0, 20); /* GBit Ethernet */ |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 96 | |
Torsten Duwe | f4c57a9 | 2008-01-07 11:13:16 +0000 | [diff] [blame] | 97 | /* The PCIe slots, each on its own bus */ |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 98 | k = 1; |
| 99 | for(i=0; i<4; i++){ |
| 100 | for(j=7; j>1; j--){ |
| 101 | if(k>3) k=0; |
| 102 | PCI_INT(j,0,i, 16+k); |
| 103 | k++; |
| 104 | } |
| 105 | k--; |
| 106 | } |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 107 | |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 108 | /* On bus 1: the PCI bus slots... |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 109 | pyhsical PCI slots are j = 7,8 |
| 110 | FireWire is j = 10 |
Harald Gutmann | da83361 | 2009-06-18 10:05:41 +0000 | [diff] [blame] | 111 | */ |
| 112 | k=2; |
| 113 | for(i=0; i<4; i++){ |
| 114 | for(j=6; j<11; j++){ |
| 115 | if(k>3) k=0; |
| 116 | PCI_INT(1,j,i, 16+k); |
| 117 | k++; |
| 118 | } |
| 119 | } |
Torsten Duwe | f4c57a9 | 2008-01-07 11:13:16 +0000 | [diff] [blame] | 120 | |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 121 | /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ |
Tobias Diedrich | b907d32 | 2010-10-26 22:40:16 +0000 | [diff] [blame^] | 122 | smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0); |
| 123 | smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1); |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 124 | /* There is no extension information... */ |
| 125 | |
| 126 | /* Compute the checksums */ |
| 127 | mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length); |
| 128 | mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length); |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 129 | printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", |
Yinghai Lu | f55b58d | 2007-02-17 14:28:11 +0000 | [diff] [blame] | 130 | mc, smp_next_mpe_entry(mc)); |
| 131 | return smp_next_mpe_entry(mc); |
| 132 | } |
| 133 | |
| 134 | unsigned long write_smp_table(unsigned long addr) |
| 135 | { |
| 136 | void *v; |
| 137 | v = smp_write_floating_table(addr); |
| 138 | return (unsigned long)smp_write_config_table(v); |
| 139 | } |