blob: 2f690b48154c3d2653281c78f893286baffaeef3 [file] [log] [blame]
Nicolas Reinecke29d358e2015-01-31 19:20:50 +01001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008-2009 coresystems GmbH
5 * Copyright (C) 2014 Vladimir Serbinenko
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
10 * the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
20 * MA 02110-1301 USA
21 */
22
23#include <arch/io.h>
24#include <console/console.h>
25#include <cpu/x86/smm.h>
26#include <ec/acpi/ec.h>
27#include <ec/lenovo/h8/h8.h>
28#include <southbridge/intel/bd82x6x/nvs.h>
29#include <southbridge/intel/bd82x6x/pch.h>
30#include <southbridge/intel/bd82x6x/me.h>
31#include <northbridge/intel/sandybridge/sandybridge.h>
32#include <cpu/intel/model_206ax/model_206ax.h>
33
34#define GPE_EC_SCI 1
35#define GPE_EC_WAKE 13
36
37/* The southbridge SMI handler checks whether gnvs has a
38 * valid pointer before calling the trap handler
39 */
40extern global_nvs_t *gnvs;
41
42static void mainboard_smm_init(void)
43{
44 printk(BIOS_DEBUG, "initializing SMI\n");
45 /* Enable 0x1600/0x1600 register pair */
46 ec_set_bit(0x00, 0x05);
47}
48
49int mainboard_io_trap_handler(int smif)
50{
51 static int smm_initialized;
52
53 if (!smm_initialized) {
54 mainboard_smm_init();
55 smm_initialized = 1;
56 }
57
58 switch (smif) {
59 default:
60 return 0;
61 }
62
63 /* On success, the IO Trap Handler returns 1
64 * On failure, the IO Trap Handler returns a value != 1 */
65 return 1;
66}
67
68static void mainboard_smi_brightness_up(void)
69{
70 u8 value;
71
72 if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) < 0xf0)
73 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4, (value + 0x10) | 0xf);
74}
75
76static void mainboard_smi_brightness_down(void)
77{
78 u8 value;
79
80 if ((value = pci_read_config8(PCI_DEV(0, 2, 1), 0xf4)) > 0x10)
81 pci_write_config8(PCI_DEV(0, 2, 1), 0xf4,
82 (value - 0x10) & 0xf0);
83}
84
85static void mainboard_smi_handle_ec_sci(void)
86{
87 u8 status = inb(EC_SC);
88 u8 event;
89
90 if (!(status & EC_SCI_EVT))
91 return;
92
93 event = ec_query();
94 printk(BIOS_DEBUG, "EC event %02x\n", event);
95
96 switch (event) {
97 case 0x14:
98 /* brightness up */
99 mainboard_smi_brightness_up();
100 break;
101 case 0x15:
102 /* brightness down */
103 mainboard_smi_brightness_down();
104 break;
105 default:
106 break;
107 }
108}
109
110void mainboard_smi_gpi(u32 gpi_sts)
111{
112 if (gpi_sts & (1 << GPE_EC_SCI))
113 mainboard_smi_handle_ec_sci();
114}
115
116static int mainboard_finalized = 0;
117
118int mainboard_smi_apmc(u8 data)
119{
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100120 switch (data) {
121 case APM_CNT_ACPI_ENABLE:
122 /* use 0x1600/0x1604 to prevent races with userspace */
123 ec_set_ports(0x1604, 0x1600);
124 /* route EC_SCI to SCI */
Kyösti Mälkkib85a87b2014-12-29 11:32:27 +0200125 gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100126 /* discard all events, and enable attention */
127 ec_write(0x80, 0x01);
128 break;
129 case APM_CNT_ACPI_DISABLE:
130 /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
131 provide a EC query function */
132 ec_set_ports(0x66, 0x62);
Kyösti Mälkkib85a87b2014-12-29 11:32:27 +0200133 /* route EC_SCI to SMI */
134 gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100135 /* discard all events, and enable attention */
136 ec_write(0x80, 0x01);
137 break;
138 case APM_CNT_FINALIZE:
139 printk(BIOS_DEBUG, "APMC: FINALIZE\n");
140 if (mainboard_finalized) {
141 printk(BIOS_DEBUG, "APMC#: Already finalized\n");
142 return 0;
143 }
144
145 intel_me_finalize_smm();
146 intel_pch_finalize_smm();
147 intel_sandybridge_finalize_smm();
148 intel_model_206ax_finalize_smm();
149
150 mainboard_finalized = 1;
151 break;
152
153 default:
154 break;
155 }
156 return 0;
157}
158
159void mainboard_smi_sleep(u8 slp_typ)
160{
161 if (slp_typ == 3) {
162 u8 ec_wake = ec_read(0x32);
163 /* If EC wake events are enabled, enable wake on EC WAKE GPE. */
164 if (ec_wake & 0x14) {
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100165 /* Redirect EC WAKE GPE to SCI. */
Kyösti Mälkkib85a87b2014-12-29 11:32:27 +0200166 gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100167 }
168 }
169}