blob: 1332cd8548b5ae89a070aca74d99987cf30fd932 [file] [log] [blame]
Vladimir Serbinenko94930e22014-08-24 22:40:33 +02001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Vladimir Serbinenko94930e22014-08-24 22:40:33 +02005
6 # Enable DisplayPort Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Enable Panel as LVDS and configure power delays
10 register "gpu_panel_port_select" = "0" # LVDS
11 register "gpu_panel_power_cycle_delay" = "5"
12 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
13 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
14 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
15 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
Vladimir Serbinenkoa71bdc32014-08-30 00:35:39 +020016 register "gfx.use_spread_spectrum_clock" = "1"
Vladimir Serbinenkoa71bdc32014-08-30 00:35:39 +020017 register "gfx.link_frequency_270_mhz" = "1"
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020018 register "gpu_cpu_backlight" = "0x1155"
19 register "gpu_pch_backlight" = "0x06100610"
20
21 device cpu_cluster 0 on
22 chip cpu/intel/socket_rPGA989
23 device lapic 0 on end
24 end
25 chip cpu/intel/model_206ax
26 # Magic APIC ID to locate this chip
27 device lapic 0xACAC off end
28
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020029 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
30 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
31 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
32
33 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
34 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
35 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
36 end
37 end
38
Patrick Rudolph266a1f72016-06-09 18:13:34 +020039 register "pci_mmio_size" = "1024"
40
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020041 device domain 0 on
42 device pci 00.0 on
43 subsystemid 0x17aa 0x21db
44 end # host bridge
45 device pci 01.0 off end # PCIe Bridge for discrete graphics
46 device pci 02.0 on
47 subsystemid 0x17aa 0x21db
48 end # vga controller
49
50 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020051 # GPI routing
52 # 0 No effect (default)
53 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
54 # 2 SCI (if corresponding GPIO_EN bit is also set)
55 register "alt_gp_smi_en" = "0x0000"
56 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010057 register "gpi13_routing" = "2"
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020058
59 # Enable SATA ports 0 (HDD bay) & 1 (dock) & 2 (msata)
60 register "sata_port_map" = "0x7"
61 # Set max SATA speed to 6.0 Gb/s
62 register "sata_interface_speed_support" = "0x3"
63
64 register "gen1_dec" = "0x7c1601"
65 register "gen2_dec" = "0x0c15e1"
66 register "gen4_dec" = "0x0c06a1"
67
Vladimir Serbinenko36fa5b82014-10-28 23:43:20 +010068 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
69
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020070 # Enable zero-based linear PCIe root port functions
71 register "pcie_port_coalesce" = "1"
72
Vladimir Serbinenko5b044ae2014-10-25 15:20:55 +020073 register "c2_latency" = "101" # c2 not supported
74 register "p_cnt_throttling_supported" = "1"
75
Patrick Rudolphc670a412017-04-28 17:28:32 +020076 register "spi_uvscc" = "0x2005"
77 register "spi_lvscc" = "0x2005"
78
Alexander Couzens0793afe2016-04-10 23:19:18 +020079 device pci 16.0 off end # Management Engine Interface 1
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020080 device pci 16.1 off end # Management Engine Interface 2
81 device pci 16.2 off end # Management Engine IDE-R
82 device pci 16.3 off end # Management Engine KT
83 device pci 19.0 on
84 subsystemid 0x17aa 0x21ce
85 end # Intel Gigabit Ethernet
86 device pci 1a.0 on
87 subsystemid 0x17aa 0x21db
88 end # USB2 EHCI #2
89 device pci 1b.0 on
90 subsystemid 0x17aa 0x21db
91 end # High Definition Audio
92 device pci 1c.0 on
93 subsystemid 0x17aa 0x21db
94 end # PCIe Port #1
95 device pci 1c.1 on
96 subsystemid 0x17aa 0x21db
97 end # PCIe Port #2 (wlan)
98 device pci 1c.2 on
99 subsystemid 0x17aa 0x21db
100 end # PCIe Port #3
101 device pci 1c.3 on
102 subsystemid 0x17aa 0x21db
103 end # PCIe Port #4
104 device pci 1c.4 on
105 subsystemid 0x17aa 0x21db
Vladimir Serbinenko795f96e2014-10-27 02:45:22 +0100106 chip drivers/ricoh/rce822
107 register "sdwppol" = "1"
108 register "disable_mask" = "0x87"
109 device pci 00.0 on
110 subsystemid 0x17aa 0x21fa
111 end
Vladimir Serbinenko94930e22014-08-24 22:40:33 +0200112 end
113 end # PCIe Port #5 (SD)
114 device pci 1c.5 off end # PCIe Port #6
Marian Tietz7c6c4df2016-01-09 18:18:47 +0100115 device pci 1c.6 on
116 subsystemid 0x17aa 0x21db
117 end # PCIe Port #7
Vladimir Serbinenko94930e22014-08-24 22:40:33 +0200118 device pci 1c.7 off end # PCIe Port #8
119 device pci 1d.0 on
120 subsystemid 0x17aa 0x21db
121 end # USB2 EHCI #1
122 device pci 1e.0 off end # PCI bridge
123 device pci 1f.0 on #LPC bridge
124 subsystemid 0x17aa 0x21db
125 chip ec/lenovo/pmh7
126 device pnp ff.1 on # dummy
127 end
128 register "backlight_enable" = "0x01"
129 register "dock_event_enable" = "0x01"
130 end
131
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +0200132 chip drivers/pc80/tpm
133 device pnp 0c31.0 on end
134 end
135
Vladimir Serbinenko94930e22014-08-24 22:40:33 +0200136 chip ec/lenovo/h8
137 device pnp ff.2 on # dummy
138 io 0x60 = 0x62
139 io 0x62 = 0x66
140 io 0x64 = 0x1600
141 io 0x66 = 0x1604
142 end
143
144 register "config0" = "0xa6"
145 register "config1" = "0x01"
146 register "config2" = "0xa0"
147 register "config3" = "0x60"
148
149 register "has_keyboard_backlight" = "0"
150
151 register "beepmask0" = "0x00"
152 register "beepmask1" = "0x86"
153 register "has_power_management_beeps" = "1"
154 register "event2_enable" = "0xff"
155 register "event3_enable" = "0xff"
156 register "event4_enable" = "0xd0"
157 register "event5_enable" = "0xfc"
158 register "event6_enable" = "0x00"
159 register "event7_enable" = "0x81"
160 register "event8_enable" = "0x7b"
161 register "event9_enable" = "0xff"
162 register "eventa_enable" = "0x01"
163 register "eventb_enable" = "0xf0"
164 register "eventc_enable" = "0xff"
165 register "eventd_enable" = "0xff"
166 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200167
168 register "has_bdc_detection" = "1"
169 register "bdc_gpio_num" = "54"
170 register "bdc_gpio_lvl" = "0"
Vladimir Serbinenko94930e22014-08-24 22:40:33 +0200171 end
172 end # LPC bridge
173 device pci 1f.2 on
174 subsystemid 0x17aa 0x21db
175 end # SATA Controller 1
176 device pci 1f.3 on
177 subsystemid 0x17aa 0x21db
178 # eeprom, 8 virtual devices, same chip
179 chip drivers/i2c/at24rf08c
180 device i2c 54 on end
181 device i2c 55 on end
182 device i2c 56 on end
183 device i2c 57 on end
184 device i2c 5c on end
185 device i2c 5d on end
186 device i2c 5e on end
187 device i2c 5f on end
188 end
189 end # SMBus
190 device pci 1f.5 off end # SATA Controller 2
191 device pci 1f.6 on
192 subsystemid 0x17aa 0x21db
193 end # Thermal
194 end
195 end
196end