| Michael Gold | b70a45a | 2009-07-05 19:29:39 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2009 Michael Gold <mgold@ncf.ca> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | #include <arch/pirq_routing.h> |
| 22 | |
| 23 | /* |
| 24 | * Each of PIRQA..D can be routed to IRQ 3-7, 9-12, 14, or 15; but the |
| 25 | * selected IRQs can't be shared with ISA devices (Intel DS 290655-003, |
| 26 | * section 5.7.6). |
| 27 | * |
| 28 | * Correspondingly, the IRQs used on the Super I/O (4,6,7,10,12) are |
| 29 | * excluded from the masks, leaving 0xca28 (3,5,9,11,14,15). |
| 30 | */ |
| 31 | |
| 32 | const struct irq_routing_table intel_irq_routing_table = { |
| 33 | PIRQ_SIGNATURE, /* u32 signature */ |
| 34 | PIRQ_VERSION, /* u16 version */ |
| 35 | 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ |
| 36 | 0x00, /* Interrupt router bus */ |
| 37 | (0x1f << 3) | 0x0, /* Interrupt router dev */ |
| 38 | 0, /* IRQs devoted exclusively to PCI usage */ |
| 39 | 0x8086, /* Vendor */ |
| 40 | 0x7000, /* Device */ |
| 41 | 0, /* Miniport */ |
| 42 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ |
| 43 | 0xb6, /* Checksum (has to be set to some value that |
| 44 | * would give 0 after the sum of all bytes |
| 45 | * for this structure (including checksum). |
| 46 | */ |
| 47 | { |
| 48 | /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| 49 | {0x00, (0x1f << 3) | 0x0, {{0x00, 0x0000}, {0x61, 0xca28}, {0x00, 0x0000}, {0x63, 0xca28}}, 0x0, 0x0}, |
| 50 | {0x00, (0x1e << 3) | 0x0, {{0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}}, 0x0, 0x0}, |
| 51 | {0x00, (0x01 << 3) | 0x0, {{0x60, 0xca28}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, |
| 52 | {0x01, (0x05 << 3) | 0x0, {{0x63, 0xca28}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0}, |
| 53 | {0x01, (0x08 << 3) | 0x0, {{0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}}, 0x1, 0x0}, |
| 54 | {0x01, (0x09 << 3) | 0x0, {{0x61, 0xca28}, {0x62, 0xca28}, {0x63, 0xca28}, {0x60, 0xca28}}, 0x2, 0x0}, |
| 55 | {0x01, (0x0a << 3) | 0x0, {{0x62, 0xca28}, {0x63, 0xca28}, {0x60, 0xca28}, {0x61, 0xca28}}, 0x3, 0x0}, |
| 56 | {0x01, (0x0b << 3) | 0x0, {{0x63, 0xca28}, {0x60, 0xca28}, {0x61, 0xca28}, {0x62, 0xca28}}, 0x4, 0x0}, |
| 57 | } |
| 58 | }; |
| 59 | |
| 60 | unsigned long write_pirq_routing_table(unsigned long addr) |
| 61 | { |
| 62 | return copy_pirq_routing_table(addr); |
| 63 | } |