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review.coreboot.org / coreboot / b706288d95824f09de15b7d6343ef169b010ff3e / . / util / msrtool / cs5536.c
blob: 9017572237292a2ced38e6e45dfd4f9ebb773947 [file] [log] [blame]
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]1/*
2 * This file is part of msrtool.
3 *
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]4 * Copyright (c) 2009 Peter Stuge <peter@stuge.se>
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +0100[diff] [blame]17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]18 */
19
20#include "msrtool.h"
21
Anton Kochkov59b36f12012-07-21 07:29:48 +0400[diff] [blame]22int cs5536_probe(const struct targetdef *target, const struct cpuid_t *id) {
Peter Stugefbda0d32009-01-26 04:12:58 +0000[diff] [blame]23 return (NULL != pci_dev_find(0x1022, 0x2090));
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]24}
25
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]26/**
27 * Documentation referenced:
28 *
29 * 33238G: AMD Geode(tm) CS5536 Companion Device Data Book
30 * http://www.amd.com/files/connectivitysolutions/geode/geode_lx/33238G_cs5536_db.pdf
31 *
32 */
33
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]34const struct msrdef cs5536_msrs[] = {
Peter Stuge9f26b8f2009-07-10 03:10:26 +0000[diff] [blame]35 /* 0x51400008-0x5140000f per 33238G pages 356-361 */
36 /* 0x51400015 per 33238G pages 365-366 */
37 /* 0x51400020-0x51400027 per 33238G pages 379-385 */
38 { 0x51400008, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_IRQ", "Local BAR - IRQ Mapper", {
39 { 63, 15, RESERVED },
40 { 48, 1, RESERVED },
41 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
42 { BITVAL_EOT }
43 }},
44 { 43, 11, RESERVED },
45 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
46 { MSR1(0), "Disable LBAR" },
47 { MSR1(1), "Enable LBAR" },
48 { BITVAL_EOT }
49 }},
50 { 31, 15, RESERVED },
51 { 16, 1, RESERVED },
52 { 15, 11, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
53 { BITVAL_EOT }
54 }},
55 { 4, 5, RESERVED },
56 { BITS_EOT }
57 }},
58 { 0x51400009, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_KEL", "Local BAR - Keyboard Emulation Logic from USB", {
59 { 63, 20, "MEM_MASK", "Memory Address Mask Value", PRESENT_HEX, {
60 { BITVAL_EOT }
61 }},
62 { 43, 11, RESERVED },
63 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
64 { MSR1(0), "Disable LBAR" },
65 { MSR1(1), "Enable LBAR" },
66 { BITVAL_EOT }
67 }},
68 { 31, 20, "BASE_ADDR", "Base Address in Memory Space", PRESENT_HEX, {
69 { BITVAL_EOT }
70 }},
71 { 11, 12, RESERVED },
72 { BITS_EOT }
73 }},
74 /* 0x5140000a is not mentioned in the databook */
75 { 0x5140000b, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_SMB", "Local BAR - System Management Bus", {
76 { 63, 15, RESERVED },
77 { 48, 1, RESERVED },
78 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
79 { BITVAL_EOT }
80 }},
81 { 43, 11, RESERVED },
82 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
83 { MSR1(0), "Disable LBAR" },
84 { MSR1(1), "Enable LBAR" },
85 { BITVAL_EOT }
86 }},
87 { 31, 15, RESERVED },
88 { 16, 1, RESERVED },
89 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
90 { BITVAL_EOT }
91 }},
92 { 7, 8, RESERVED },
93 { BITS_EOT }
94 }},
95 { 0x5140000c, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_GPIO", "Local BAR - GPIO and Input Conditioning Functions", {
96 { 63, 15, RESERVED },
97 { 48, 1, RESERVED },
98 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
99 { BITVAL_EOT }
100 }},
101 { 43, 11, RESERVED },
102 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
103 { MSR1(0), "Disable LBAR" },
104 { MSR1(1), "Enable LBAR" },
105 { BITVAL_EOT }
106 }},
107 { 31, 15, RESERVED },
108 { 16, 1, RESERVED },
109 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
110 { BITVAL_EOT }
111 }},
112 { 7, 8, RESERVED },
113 { BITS_EOT }
114 }},
115 { 0x5140000d, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_MFGPT", "Local BAR - MFGPTs", {
116 { 63, 15, RESERVED },
117 { 48, 1, RESERVED },
118 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
119 { BITVAL_EOT }
120 }},
121 { 43, 11, RESERVED },
122 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
123 { MSR1(0), "Disable LBAR" },
124 { MSR1(1), "Enable LBAR" },
125 { BITVAL_EOT }
126 }},
127 { 31, 15, RESERVED },
128 { 16, 1, RESERVED },
129 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
130 { BITVAL_EOT }
131 }},
132 { 7, 8, RESERVED },
133 { BITS_EOT }
134 }},
135 { 0x5140000e, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_ACPI", "Local BAR - ACPI", {
136 { 63, 15, RESERVED },
137 { 48, 1, RESERVED },
138 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
139 { BITVAL_EOT }
140 }},
141 { 43, 11, RESERVED },
142 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
143 { MSR1(0), "Disable LBAR" },
144 { MSR1(1), "Enable LBAR" },
145 { BITVAL_EOT }
146 }},
147 { 31, 15, RESERVED },
148 { 16, 1, RESERVED },
149 { 15, 8, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
150 { BITVAL_EOT }
151 }},
152 { 7, 8, RESERVED },
153 { BITS_EOT }
154 }},
155 { 0x5140000f, MSRTYPE_RDWR, MSR2(0, 0), "DIVIL_LBAR_PMS", "Local BAR - Power Management Support", {
156 { 63, 15, RESERVED },
157 { 48, 1, RESERVED },
158 { 47, 4, "IO_MASK", "I/O Address Mask Value", PRESENT_BIN, {
159 { BITVAL_EOT }
160 }},
161 { 43, 11, RESERVED },
162 { 32, 1, "LBAR_EN", "LBAR Enable", PRESENT_BIN, {
163 { MSR1(0), "Disable LBAR" },
164 { MSR1(1), "Enable LBAR" },
165 { BITVAL_EOT }
166 }},
167 { 31, 15, RESERVED },
168 { 16, 1, RESERVED },
169 { 15, 9, "BASE_ADDR", "Base Address in I/O Space", PRESENT_HEX, {
170 { BITVAL_EOT }
171 }},
172 { 6, 7, RESERVED },
173 { BITS_EOT }
174 }},
175 { 0x51400015, MSRTYPE_RDWR, MSR2(0, 0x70), "DIVIL_BALL_OPTS", "Ball Options Control", {
176 { 63, 32, RESERVED },
177 { 31, 20, RESERVED },
178 { 11, 2, "SEC_BOOT_LOC", "Secondary Boot Location", PRESENT_BIN, {
179 { MSR1(0), "LPC ROM" },
180 { MSR1(2), "NOR Flash on IDE" },
181 { MSR1(3), "Firmware Hub" },
182 { BITVAL_EOT }
183 }},
184 { 9, 2, "BOOT_OP_LATCHED", "Latched Value of Boot Option", PRESENT_BIN, {
185 { MSR1(0), "LPC ROM" },
186 { MSR1(2), "NOR Flash on IDE" },
187 { MSR1(3), "Firmware Hub" },
188 { BITVAL_EOT }
189 }},
190 { 7, 1, RESERVED },
191 { 6, 1, "PIN_OPT_LALL", "All LPC Pin Option Selection", PRESENT_BIN, {
192 { MSR1(0), "All LPC pins become GPIOs including LPC_DRQ# and LPC_SERIRQ" },
193 { MSR1(1), "All LPC pins are controlled by the LPC controller except LPC_DRQ# and LPC_SERIRQ (bits [5:4])" },
194 { BITVAL_EOT }
195 }},
196 { 5, 1, "PIN_OPT_LIRQ", "LPC_SERIRQ or GPIO21 Pin Option Selection", PRESENT_BIN, {
197 { MSR1(0), "Ball G2 is GPIO21" },
198 { MSR1(1), "Ball G2 functions as LPC_SERIRQ" },
199 { BITVAL_EOT }
200 }},
201 { 4, 1, "PIN_OPT_LDRQ", "LPC_DRQ# or GPIO20 Pin Option Selection", PRESENT_BIN, {
202 { MSR1(0), "Ball G1 is GPIO20" },
203 { MSR1(1), "Ball G1 functions as LPC_DRQ#" },
204 { BITVAL_EOT }
205 }},
206 { 3, 2, "PRI_BOOT_LOC", "Primary Boot Location", PRESENT_BIN, {
207 { MSR1(0), "LPC ROM" },
208 { MSR1(2), "NOR Flash on IDE" },
209 { MSR1(3), "Firmware Hub" },
210 { BITVAL_EOT }
211 }},
212 { 1, 1, RESERVED },
213 { 0, 1, "PIN_OPT_IDE", "IDE or Flash Controller Pin Function Selection", PRESENT_BIN, {
214 { MSR1(0), "All IDE pins associated with Flash Controller" },
215 { MSR1(1), "All IDE pins associated with IDE Controller" },
216 { BITVAL_EOT }
217 }},
218 }},
219 { 0x51400020, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_LOW", "IRQ Mapper Unrestricted Y Select Low", {
220 { 63, 32, RESERVED },
221 { 31, 4, "MAP_Y7", "Map Unrestricted Y Input 7", PRESENT_BIN, {
222 { MSR1(0), "Disable" },
223 { MSR1(1), "Interrupt Group 1" },
224 { MSR1(2), "Interrupt Group 2" },
225 { MSR1(3), "Interrupt Group 3" },
226 { MSR1(4), "Interrupt Group 4" },
227 { MSR1(5), "Interrupt Group 5" },
228 { MSR1(6), "Interrupt Group 6" },
229 { MSR1(7), "Interrupt Group 7" },
230 { MSR1(8), "Interrupt Group 8" },
231 { MSR1(9), "Interrupt Group 9" },
232 { MSR1(10), "Interrupt Group 10" },
233 { MSR1(11), "Interrupt Group 11" },
234 { MSR1(12), "Interrupt Group 12" },
235 { MSR1(13), "Interrupt Group 13" },
236 { MSR1(14), "Interrupt Group 14" },
237 { MSR1(15), "Interrupt Group 15" },
238 { BITVAL_EOT }
239 }},
240 { 27, 4, "MAP_Y6", "Map Unrestricted Y Input 6", PRESENT_BIN, {
241 { MSR1(0), "Disable" },
242 { MSR1(1), "Interrupt Group 1" },
243 { MSR1(2), "Interrupt Group 2" },
244 { MSR1(3), "Interrupt Group 3" },
245 { MSR1(4), "Interrupt Group 4" },
246 { MSR1(5), "Interrupt Group 5" },
247 { MSR1(6), "Interrupt Group 6" },
248 { MSR1(7), "Interrupt Group 7" },
249 { MSR1(8), "Interrupt Group 8" },
250 { MSR1(9), "Interrupt Group 9" },
251 { MSR1(10), "Interrupt Group 10" },
252 { MSR1(11), "Interrupt Group 11" },
253 { MSR1(12), "Interrupt Group 12" },
254 { MSR1(13), "Interrupt Group 13" },
255 { MSR1(14), "Interrupt Group 14" },
256 { MSR1(15), "Interrupt Group 15" },
257 { BITVAL_EOT }
258 }},
259 { 23, 4, "MAP_Y5", "Map Unrestricted Y Input 5", PRESENT_BIN, {
260 { MSR1(0), "Disable" },
261 { MSR1(1), "Interrupt Group 1" },
262 { MSR1(2), "Interrupt Group 2" },
263 { MSR1(3), "Interrupt Group 3" },
264 { MSR1(4), "Interrupt Group 4" },
265 { MSR1(5), "Interrupt Group 5" },
266 { MSR1(6), "Interrupt Group 6" },
267 { MSR1(7), "Interrupt Group 7" },
268 { MSR1(8), "Interrupt Group 8" },
269 { MSR1(9), "Interrupt Group 9" },
270 { MSR1(10), "Interrupt Group 10" },
271 { MSR1(11), "Interrupt Group 11" },
272 { MSR1(12), "Interrupt Group 12" },
273 { MSR1(13), "Interrupt Group 13" },
274 { MSR1(14), "Interrupt Group 14" },
275 { MSR1(15), "Interrupt Group 15" },
276 { BITVAL_EOT }
277 }},
278 { 19, 4, "MAP_Y4", "Map Unrestricted Y Input 4", PRESENT_BIN, {
279 { MSR1(0), "Disable" },
280 { MSR1(1), "Interrupt Group 1" },
281 { MSR1(2), "Interrupt Group 2" },
282 { MSR1(3), "Interrupt Group 3" },
283 { MSR1(4), "Interrupt Group 4" },
284 { MSR1(5), "Interrupt Group 5" },
285 { MSR1(6), "Interrupt Group 6" },
286 { MSR1(7), "Interrupt Group 7" },
287 { MSR1(8), "Interrupt Group 8" },
288 { MSR1(9), "Interrupt Group 9" },
289 { MSR1(10), "Interrupt Group 10" },
290 { MSR1(11), "Interrupt Group 11" },
291 { MSR1(12), "Interrupt Group 12" },
292 { MSR1(13), "Interrupt Group 13" },
293 { MSR1(14), "Interrupt Group 14" },
294 { MSR1(15), "Interrupt Group 15" },
295 { BITVAL_EOT }
296 }},
297 { 15, 4, "MAP_Y3", "Map Unrestricted Y Input 3", PRESENT_BIN, {
298 { MSR1(0), "Disable" },
299 { MSR1(1), "Interrupt Group 1" },
300 { MSR1(2), "Interrupt Group 2" },
301 { MSR1(3), "Interrupt Group 3" },
302 { MSR1(4), "Interrupt Group 4" },
303 { MSR1(5), "Interrupt Group 5" },
304 { MSR1(6), "Interrupt Group 6" },
305 { MSR1(7), "Interrupt Group 7" },
306 { MSR1(8), "Interrupt Group 8" },
307 { MSR1(9), "Interrupt Group 9" },
308 { MSR1(10), "Interrupt Group 10" },
309 { MSR1(11), "Interrupt Group 11" },
310 { MSR1(12), "Interrupt Group 12" },
311 { MSR1(13), "Interrupt Group 13" },
312 { MSR1(14), "Interrupt Group 14" },
313 { MSR1(15), "Interrupt Group 15" },
314 { BITVAL_EOT }
315 }},
316 { 11, 4, "MAP_Y2", "Map Unrestricted Y Input 2", PRESENT_BIN, {
317 { MSR1(0), "Disable" },
318 { MSR1(1), "Interrupt Group 1" },
319 { MSR1(2), "Interrupt Group 2" },
320 { MSR1(3), "Interrupt Group 3" },
321 { MSR1(4), "Interrupt Group 4" },
322 { MSR1(5), "Interrupt Group 5" },
323 { MSR1(6), "Interrupt Group 6" },
324 { MSR1(7), "Interrupt Group 7" },
325 { MSR1(8), "Interrupt Group 8" },
326 { MSR1(9), "Interrupt Group 9" },
327 { MSR1(10), "Interrupt Group 10" },
328 { MSR1(11), "Interrupt Group 11" },
329 { MSR1(12), "Interrupt Group 12" },
330 { MSR1(13), "Interrupt Group 13" },
331 { MSR1(14), "Interrupt Group 14" },
332 { MSR1(15), "Interrupt Group 15" },
333 { BITVAL_EOT }
334 }},
335 { 7, 4, "MAP_Y1", "Map Unrestricted Y Input 1", PRESENT_BIN, {
336 { MSR1(0), "Disable" },
337 { MSR1(1), "Interrupt Group 1" },
338 { MSR1(2), "Interrupt Group 2" },
339 { MSR1(3), "Interrupt Group 3" },
340 { MSR1(4), "Interrupt Group 4" },
341 { MSR1(5), "Interrupt Group 5" },
342 { MSR1(6), "Interrupt Group 6" },
343 { MSR1(7), "Interrupt Group 7" },
344 { MSR1(8), "Interrupt Group 8" },
345 { MSR1(9), "Interrupt Group 9" },
346 { MSR1(10), "Interrupt Group 10" },
347 { MSR1(11), "Interrupt Group 11" },
348 { MSR1(12), "Interrupt Group 12" },
349 { MSR1(13), "Interrupt Group 13" },
350 { MSR1(14), "Interrupt Group 14" },
351 { MSR1(15), "Interrupt Group 15" },
352 { BITVAL_EOT }
353 }},
354 { 3, 4, "MAP_Y0", "Map Unrestricted Y Input 0", PRESENT_BIN, {
355 { MSR1(0), "Disable" },
356 { MSR1(1), "Interrupt Group 1" },
357 { MSR1(2), "Interrupt Group 2" },
358 { MSR1(3), "Interrupt Group 3" },
359 { MSR1(4), "Interrupt Group 4" },
360 { MSR1(5), "Interrupt Group 5" },
361 { MSR1(6), "Interrupt Group 6" },
362 { MSR1(7), "Interrupt Group 7" },
363 { MSR1(8), "Interrupt Group 8" },
364 { MSR1(9), "Interrupt Group 9" },
365 { MSR1(10), "Interrupt Group 10" },
366 { MSR1(11), "Interrupt Group 11" },
367 { MSR1(12), "Interrupt Group 12" },
368 { MSR1(13), "Interrupt Group 13" },
369 { MSR1(14), "Interrupt Group 14" },
370 { MSR1(15), "Interrupt Group 15" },
371 { BITVAL_EOT }
372 }},
373 { BITS_EOT }
374 }},
375 { 0x51400021, MSRTYPE_RDWR, MSR2(0, 0), "PIC_YSEL_HIGH", "IRQ Mapper Unrestricted Y Select High", {
376 { 63, 32, RESERVED },
377 { 31, 4, "MAP_Y15", "Map Unrestricted Y Input 15", PRESENT_BIN, {
378 { MSR1(0), "Disable" },
379 { MSR1(1), "Interrupt Group 1" },
380 { MSR1(2), "Interrupt Group 2" },
381 { MSR1(3), "Interrupt Group 3" },
382 { MSR1(4), "Interrupt Group 4" },
383 { MSR1(5), "Interrupt Group 5" },
384 { MSR1(6), "Interrupt Group 6" },
385 { MSR1(7), "Interrupt Group 7" },
386 { MSR1(8), "Interrupt Group 8" },
387 { MSR1(9), "Interrupt Group 9" },
388 { MSR1(10), "Interrupt Group 10" },
389 { MSR1(11), "Interrupt Group 11" },
390 { MSR1(12), "Interrupt Group 12" },
391 { MSR1(13), "Interrupt Group 13" },
392 { MSR1(14), "Interrupt Group 14" },
393 { MSR1(15), "Interrupt Group 15" },
394 { BITVAL_EOT }
395 }},
396 { 27, 4, "MAP_Y14", "Map Unrestricted Y Input 14", PRESENT_BIN, {
397 { MSR1(0), "Disable" },
398 { MSR1(1), "Interrupt Group 1" },
399 { MSR1(2), "Interrupt Group 2" },
400 { MSR1(3), "Interrupt Group 3" },
401 { MSR1(4), "Interrupt Group 4" },
402 { MSR1(5), "Interrupt Group 5" },
403 { MSR1(6), "Interrupt Group 6" },
404 { MSR1(7), "Interrupt Group 7" },
405 { MSR1(8), "Interrupt Group 8" },
406 { MSR1(9), "Interrupt Group 9" },
407 { MSR1(10), "Interrupt Group 10" },
408 { MSR1(11), "Interrupt Group 11" },
409 { MSR1(12), "Interrupt Group 12" },
410 { MSR1(13), "Interrupt Group 13" },
411 { MSR1(14), "Interrupt Group 14" },
412 { MSR1(15), "Interrupt Group 15" },
413 { BITVAL_EOT }
414 }},
415 { 23, 4, "MAP_Y13", "Map Unrestricted Y Input 13", PRESENT_BIN, {
416 { MSR1(0), "Disable" },
417 { MSR1(1), "Interrupt Group 1" },
418 { MSR1(2), "Interrupt Group 2" },
419 { MSR1(3), "Interrupt Group 3" },
420 { MSR1(4), "Interrupt Group 4" },
421 { MSR1(5), "Interrupt Group 5" },
422 { MSR1(6), "Interrupt Group 6" },
423 { MSR1(7), "Interrupt Group 7" },
424 { MSR1(8), "Interrupt Group 8" },
425 { MSR1(9), "Interrupt Group 9" },
426 { MSR1(10), "Interrupt Group 10" },
427 { MSR1(11), "Interrupt Group 11" },
428 { MSR1(12), "Interrupt Group 12" },
429 { MSR1(13), "Interrupt Group 13" },
430 { MSR1(14), "Interrupt Group 14" },
431 { MSR1(15), "Interrupt Group 15" },
432 { BITVAL_EOT }
433 }},
434 { 19, 4, "MAP_Y12", "Map Unrestricted Y Input 12", PRESENT_BIN, {
435 { MSR1(0), "Disable" },
436 { MSR1(1), "Interrupt Group 1" },
437 { MSR1(2), "Interrupt Group 2" },
438 { MSR1(3), "Interrupt Group 3" },
439 { MSR1(4), "Interrupt Group 4" },
440 { MSR1(5), "Interrupt Group 5" },
441 { MSR1(6), "Interrupt Group 6" },
442 { MSR1(7), "Interrupt Group 7" },
443 { MSR1(8), "Interrupt Group 8" },
444 { MSR1(9), "Interrupt Group 9" },
445 { MSR1(10), "Interrupt Group 10" },
446 { MSR1(11), "Interrupt Group 11" },
447 { MSR1(12), "Interrupt Group 12" },
448 { MSR1(13), "Interrupt Group 13" },
449 { MSR1(14), "Interrupt Group 14" },
450 { MSR1(15), "Interrupt Group 15" },
451 { BITVAL_EOT }
452 }},
453 { 15, 4, "MAP_Y11", "Map Unrestricted Y Input 11", PRESENT_BIN, {
454 { MSR1(0), "Disable" },
455 { MSR1(1), "Interrupt Group 1" },
456 { MSR1(2), "Interrupt Group 2" },
457 { MSR1(3), "Interrupt Group 3" },
458 { MSR1(4), "Interrupt Group 4" },
459 { MSR1(5), "Interrupt Group 5" },
460 { MSR1(6), "Interrupt Group 6" },
461 { MSR1(7), "Interrupt Group 7" },
462 { MSR1(8), "Interrupt Group 8" },
463 { MSR1(9), "Interrupt Group 9" },
464 { MSR1(10), "Interrupt Group 10" },
465 { MSR1(11), "Interrupt Group 11" },
466 { MSR1(12), "Interrupt Group 12" },
467 { MSR1(13), "Interrupt Group 13" },
468 { MSR1(14), "Interrupt Group 14" },
469 { MSR1(15), "Interrupt Group 15" },
470 { BITVAL_EOT }
471 }},
472 { 11, 4, "MAP_Y10", "Map Unrestricted Y Input 10", PRESENT_BIN, {
473 { MSR1(0), "Disable" },
474 { MSR1(1), "Interrupt Group 1" },
475 { MSR1(2), "Interrupt Group 2" },
476 { MSR1(3), "Interrupt Group 3" },
477 { MSR1(4), "Interrupt Group 4" },
478 { MSR1(5), "Interrupt Group 5" },
479 { MSR1(6), "Interrupt Group 6" },
480 { MSR1(7), "Interrupt Group 7" },
481 { MSR1(8), "Interrupt Group 8" },
482 { MSR1(9), "Interrupt Group 9" },
483 { MSR1(10), "Interrupt Group 10" },
484 { MSR1(11), "Interrupt Group 11" },
485 { MSR1(12), "Interrupt Group 12" },
486 { MSR1(13), "Interrupt Group 13" },
487 { MSR1(14), "Interrupt Group 14" },
488 { MSR1(15), "Interrupt Group 15" },
489 { BITVAL_EOT }
490 }},
491 { 7, 4, "MAP_Y9", "Map Unrestricted Y Input 9", PRESENT_BIN, {
492 { MSR1(0), "Disable" },
493 { MSR1(1), "Interrupt Group 1" },
494 { MSR1(2), "Interrupt Group 2" },
495 { MSR1(3), "Interrupt Group 3" },
496 { MSR1(4), "Interrupt Group 4" },
497 { MSR1(5), "Interrupt Group 5" },
498 { MSR1(6), "Interrupt Group 6" },
499 { MSR1(7), "Interrupt Group 7" },
500 { MSR1(8), "Interrupt Group 8" },
501 { MSR1(9), "Interrupt Group 9" },
502 { MSR1(10), "Interrupt Group 10" },
503 { MSR1(11), "Interrupt Group 11" },
504 { MSR1(12), "Interrupt Group 12" },
505 { MSR1(13), "Interrupt Group 13" },
506 { MSR1(14), "Interrupt Group 14" },
507 { MSR1(15), "Interrupt Group 15" },
508 { BITVAL_EOT }
509 }},
510 { 3, 4, "MAP_Y8", "Map Unrestricted Y Input 8", PRESENT_BIN, {
511 { MSR1(0), "Disable" },
512 { MSR1(1), "Interrupt Group 1" },
513 { MSR1(2), "Interrupt Group 2" },
514 { MSR1(3), "Interrupt Group 3" },
515 { MSR1(4), "Interrupt Group 4" },
516 { MSR1(5), "Interrupt Group 5" },
517 { MSR1(6), "Interrupt Group 6" },
518 { MSR1(7), "Interrupt Group 7" },
519 { MSR1(8), "Interrupt Group 8" },
520 { MSR1(9), "Interrupt Group 9" },
521 { MSR1(10), "Interrupt Group 10" },
522 { MSR1(11), "Interrupt Group 11" },
523 { MSR1(12), "Interrupt Group 12" },
524 { MSR1(13), "Interrupt Group 13" },
525 { MSR1(14), "Interrupt Group 14" },
526 { MSR1(15), "Interrupt Group 15" },
527 { BITVAL_EOT }
528 }},
529 { BITS_EOT }
530 }},
531 { 0x51400022, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_LOW", "IRQ Mapper Unrestricted Z Select Low", {
532 { 63, 32, RESERVED },
533 { 31, 4, "MAP_Z7", "Map Unrestricted Z Input 7", PRESENT_BIN, {
534 { MSR1(0), "Disable" },
535 { MSR1(1), "Interrupt Group 1" },
536 { MSR1(2), "Interrupt Group 2" },
537 { MSR1(3), "Interrupt Group 3" },
538 { MSR1(4), "Interrupt Group 4" },
539 { MSR1(5), "Interrupt Group 5" },
540 { MSR1(6), "Interrupt Group 6" },
541 { MSR1(7), "Interrupt Group 7" },
542 { MSR1(8), "Interrupt Group 8" },
543 { MSR1(9), "Interrupt Group 9" },
544 { MSR1(10), "Interrupt Group 10" },
545 { MSR1(11), "Interrupt Group 11" },
546 { MSR1(12), "Interrupt Group 12" },
547 { MSR1(13), "Interrupt Group 13" },
548 { MSR1(14), "Interrupt Group 14" },
549 { MSR1(15), "Interrupt Group 15" },
550 { BITVAL_EOT }
551 }},
552 { 27, 4, "MAP_Z6", "Map Unrestricted Z Input 6", PRESENT_BIN, {
553 { MSR1(0), "Disable" },
554 { MSR1(1), "Interrupt Group 1" },
555 { MSR1(2), "Interrupt Group 2" },
556 { MSR1(3), "Interrupt Group 3" },
557 { MSR1(4), "Interrupt Group 4" },
558 { MSR1(5), "Interrupt Group 5" },
559 { MSR1(6), "Interrupt Group 6" },
560 { MSR1(7), "Interrupt Group 7" },
561 { MSR1(8), "Interrupt Group 8" },
562 { MSR1(9), "Interrupt Group 9" },
563 { MSR1(10), "Interrupt Group 10" },
564 { MSR1(11), "Interrupt Group 11" },
565 { MSR1(12), "Interrupt Group 12" },
566 { MSR1(13), "Interrupt Group 13" },
567 { MSR1(14), "Interrupt Group 14" },
568 { MSR1(15), "Interrupt Group 15" },
569 { BITVAL_EOT }
570 }},
571 { 23, 4, "MAP_Z5", "Map Unrestricted Z Input 5", PRESENT_BIN, {
572 { MSR1(0), "Disable" },
573 { MSR1(1), "Interrupt Group 1" },
574 { MSR1(2), "Interrupt Group 2" },
575 { MSR1(3), "Interrupt Group 3" },
576 { MSR1(4), "Interrupt Group 4" },
577 { MSR1(5), "Interrupt Group 5" },
578 { MSR1(6), "Interrupt Group 6" },
579 { MSR1(7), "Interrupt Group 7" },
580 { MSR1(8), "Interrupt Group 8" },
581 { MSR1(9), "Interrupt Group 9" },
582 { MSR1(10), "Interrupt Group 10" },
583 { MSR1(11), "Interrupt Group 11" },
584 { MSR1(12), "Interrupt Group 12" },
585 { MSR1(13), "Interrupt Group 13" },
586 { MSR1(14), "Interrupt Group 14" },
587 { MSR1(15), "Interrupt Group 15" },
588 { BITVAL_EOT }
589 }},
590 { 19, 4, "MAP_Z4", "Map Unrestricted Z Input 4", PRESENT_BIN, {
591 { MSR1(0), "Disable" },
592 { MSR1(1), "Interrupt Group 1" },
593 { MSR1(2), "Interrupt Group 2" },
594 { MSR1(3), "Interrupt Group 3" },
595 { MSR1(4), "Interrupt Group 4" },
596 { MSR1(5), "Interrupt Group 5" },
597 { MSR1(6), "Interrupt Group 6" },
598 { MSR1(7), "Interrupt Group 7" },
599 { MSR1(8), "Interrupt Group 8" },
600 { MSR1(9), "Interrupt Group 9" },
601 { MSR1(10), "Interrupt Group 10" },
602 { MSR1(11), "Interrupt Group 11" },
603 { MSR1(12), "Interrupt Group 12" },
604 { MSR1(13), "Interrupt Group 13" },
605 { MSR1(14), "Interrupt Group 14" },
606 { MSR1(15), "Interrupt Group 15" },
607 { BITVAL_EOT }
608 }},
609 { 15, 4, "MAP_Z3", "Map Unrestricted Z Input 3", PRESENT_BIN, {
610 { MSR1(0), "Disable" },
611 { MSR1(1), "Interrupt Group 1" },
612 { MSR1(2), "Interrupt Group 2" },
613 { MSR1(3), "Interrupt Group 3" },
614 { MSR1(4), "Interrupt Group 4" },
615 { MSR1(5), "Interrupt Group 5" },
616 { MSR1(6), "Interrupt Group 6" },
617 { MSR1(7), "Interrupt Group 7" },
618 { MSR1(8), "Interrupt Group 8" },
619 { MSR1(9), "Interrupt Group 9" },
620 { MSR1(10), "Interrupt Group 10" },
621 { MSR1(11), "Interrupt Group 11" },
622 { MSR1(12), "Interrupt Group 12" },
623 { MSR1(13), "Interrupt Group 13" },
624 { MSR1(14), "Interrupt Group 14" },
625 { MSR1(15), "Interrupt Group 15" },
626 { BITVAL_EOT }
627 }},
628 { 11, 4, "MAP_Z2", "Map Unrestricted Z Input 2", PRESENT_BIN, {
629 { MSR1(0), "Disable" },
630 { MSR1(1), "Interrupt Group 1" },
631 { MSR1(2), "Interrupt Group 2" },
632 { MSR1(3), "Interrupt Group 3" },
633 { MSR1(4), "Interrupt Group 4" },
634 { MSR1(5), "Interrupt Group 5" },
635 { MSR1(6), "Interrupt Group 6" },
636 { MSR1(7), "Interrupt Group 7" },
637 { MSR1(8), "Interrupt Group 8" },
638 { MSR1(9), "Interrupt Group 9" },
639 { MSR1(10), "Interrupt Group 10" },
640 { MSR1(11), "Interrupt Group 11" },
641 { MSR1(12), "Interrupt Group 12" },
642 { MSR1(13), "Interrupt Group 13" },
643 { MSR1(14), "Interrupt Group 14" },
644 { MSR1(15), "Interrupt Group 15" },
645 { BITVAL_EOT }
646 }},
647 { 7, 4, "MAP_Z1", "Map Unrestricted Z Input 1", PRESENT_BIN, {
648 { MSR1(0), "Disable" },
649 { MSR1(1), "Interrupt Group 1" },
650 { MSR1(2), "Interrupt Group 2" },
651 { MSR1(3), "Interrupt Group 3" },
652 { MSR1(4), "Interrupt Group 4" },
653 { MSR1(5), "Interrupt Group 5" },
654 { MSR1(6), "Interrupt Group 6" },
655 { MSR1(7), "Interrupt Group 7" },
656 { MSR1(8), "Interrupt Group 8" },
657 { MSR1(9), "Interrupt Group 9" },
658 { MSR1(10), "Interrupt Group 10" },
659 { MSR1(11), "Interrupt Group 11" },
660 { MSR1(12), "Interrupt Group 12" },
661 { MSR1(13), "Interrupt Group 13" },
662 { MSR1(14), "Interrupt Group 14" },
663 { MSR1(15), "Interrupt Group 15" },
664 { BITVAL_EOT }
665 }},
666 { 3, 4, "MAP_Z0", "Map Unrestricted Z Input 0", PRESENT_BIN, {
667 { MSR1(0), "Disable" },
668 { MSR1(1), "Interrupt Group 1" },
669 { MSR1(2), "Interrupt Group 2" },
670 { MSR1(3), "Interrupt Group 3" },
671 { MSR1(4), "Interrupt Group 4" },
672 { MSR1(5), "Interrupt Group 5" },
673 { MSR1(6), "Interrupt Group 6" },
674 { MSR1(7), "Interrupt Group 7" },
675 { MSR1(8), "Interrupt Group 8" },
676 { MSR1(9), "Interrupt Group 9" },
677 { MSR1(10), "Interrupt Group 10" },
678 { MSR1(11), "Interrupt Group 11" },
679 { MSR1(12), "Interrupt Group 12" },
680 { MSR1(13), "Interrupt Group 13" },
681 { MSR1(14), "Interrupt Group 14" },
682 { MSR1(15), "Interrupt Group 15" },
683 { BITVAL_EOT }
684 }},
685 { BITS_EOT }
686 }},
687 { 0x51400023, MSRTYPE_RDWR, MSR2(0, 0), "PIC_ZSEL_HIGH", "IRQ Mapper Unrestricted Z Select High", {
688 { 63, 32, RESERVED },
689 { 31, 4, "MAP_Z15", "Map Unrestricted Z Input 15", PRESENT_BIN, {
690 { MSR1(0), "Disable" },
691 { MSR1(1), "Interrupt Group 1" },
692 { MSR1(2), "Interrupt Group 2" },
693 { MSR1(3), "Interrupt Group 3" },
694 { MSR1(4), "Interrupt Group 4" },
695 { MSR1(5), "Interrupt Group 5" },
696 { MSR1(6), "Interrupt Group 6" },
697 { MSR1(7), "Interrupt Group 7" },
698 { MSR1(8), "Interrupt Group 8" },
699 { MSR1(9), "Interrupt Group 9" },
700 { MSR1(10), "Interrupt Group 10" },
701 { MSR1(11), "Interrupt Group 11" },
702 { MSR1(12), "Interrupt Group 12" },
703 { MSR1(13), "Interrupt Group 13" },
704 { MSR1(14), "Interrupt Group 14" },
705 { MSR1(15), "Interrupt Group 15" },
706 { BITVAL_EOT }
707 }},
708 { 27, 4, "MAP_Z14", "Map Unrestricted Z Input 14", PRESENT_BIN, {
709 { MSR1(0), "Disable" },
710 { MSR1(1), "Interrupt Group 1" },
711 { MSR1(2), "Interrupt Group 2" },
712 { MSR1(3), "Interrupt Group 3" },
713 { MSR1(4), "Interrupt Group 4" },
714 { MSR1(5), "Interrupt Group 5" },
715 { MSR1(6), "Interrupt Group 6" },
716 { MSR1(7), "Interrupt Group 7" },
717 { MSR1(8), "Interrupt Group 8" },
718 { MSR1(9), "Interrupt Group 9" },
719 { MSR1(10), "Interrupt Group 10" },
720 { MSR1(11), "Interrupt Group 11" },
721 { MSR1(12), "Interrupt Group 12" },
722 { MSR1(13), "Interrupt Group 13" },
723 { MSR1(14), "Interrupt Group 14" },
724 { MSR1(15), "Interrupt Group 15" },
725 { BITVAL_EOT }
726 }},
727 { 23, 4, "MAP_Z13", "Map Unrestricted Z Input 13", PRESENT_BIN, {
728 { MSR1(0), "Disable" },
729 { MSR1(1), "Interrupt Group 1" },
730 { MSR1(2), "Interrupt Group 2" },
731 { MSR1(3), "Interrupt Group 3" },
732 { MSR1(4), "Interrupt Group 4" },
733 { MSR1(5), "Interrupt Group 5" },
734 { MSR1(6), "Interrupt Group 6" },
735 { MSR1(7), "Interrupt Group 7" },
736 { MSR1(8), "Interrupt Group 8" },
737 { MSR1(9), "Interrupt Group 9" },
738 { MSR1(10), "Interrupt Group 10" },
739 { MSR1(11), "Interrupt Group 11" },
740 { MSR1(12), "Interrupt Group 12" },
741 { MSR1(13), "Interrupt Group 13" },
742 { MSR1(14), "Interrupt Group 14" },
743 { MSR1(15), "Interrupt Group 15" },
744 { BITVAL_EOT }
745 }},
746 { 19, 4, "MAP_Z12", "Map Unrestricted Z Input 12", PRESENT_BIN, {
747 { MSR1(0), "Disable" },
748 { MSR1(1), "Interrupt Group 1" },
749 { MSR1(2), "Interrupt Group 2" },
750 { MSR1(3), "Interrupt Group 3" },
751 { MSR1(4), "Interrupt Group 4" },
752 { MSR1(5), "Interrupt Group 5" },
753 { MSR1(6), "Interrupt Group 6" },
754 { MSR1(7), "Interrupt Group 7" },
755 { MSR1(8), "Interrupt Group 8" },
756 { MSR1(9), "Interrupt Group 9" },
757 { MSR1(10), "Interrupt Group 10" },
758 { MSR1(11), "Interrupt Group 11" },
759 { MSR1(12), "Interrupt Group 12" },
760 { MSR1(13), "Interrupt Group 13" },
761 { MSR1(14), "Interrupt Group 14" },
762 { MSR1(15), "Interrupt Group 15" },
763 { BITVAL_EOT }
764 }},
765 { 15, 4, "MAP_Z11", "Map Unrestricted Z Input 11", PRESENT_BIN, {
766 { MSR1(0), "Disable" },
767 { MSR1(1), "Interrupt Group 1" },
768 { MSR1(2), "Interrupt Group 2" },
769 { MSR1(3), "Interrupt Group 3" },
770 { MSR1(4), "Interrupt Group 4" },
771 { MSR1(5), "Interrupt Group 5" },
772 { MSR1(6), "Interrupt Group 6" },
773 { MSR1(7), "Interrupt Group 7" },
774 { MSR1(8), "Interrupt Group 8" },
775 { MSR1(9), "Interrupt Group 9" },
776 { MSR1(10), "Interrupt Group 10" },
777 { MSR1(11), "Interrupt Group 11" },
778 { MSR1(12), "Interrupt Group 12" },
779 { MSR1(13), "Interrupt Group 13" },
780 { MSR1(14), "Interrupt Group 14" },
781 { MSR1(15), "Interrupt Group 15" },
782 { BITVAL_EOT }
783 }},
784 { 11, 4, "MAP_Z10", "Map Unrestricted Z Input 10", PRESENT_BIN, {
785 { MSR1(0), "Disable" },
786 { MSR1(1), "Interrupt Group 1" },
787 { MSR1(2), "Interrupt Group 2" },
788 { MSR1(3), "Interrupt Group 3" },
789 { MSR1(4), "Interrupt Group 4" },
790 { MSR1(5), "Interrupt Group 5" },
791 { MSR1(6), "Interrupt Group 6" },
792 { MSR1(7), "Interrupt Group 7" },
793 { MSR1(8), "Interrupt Group 8" },
794 { MSR1(9), "Interrupt Group 9" },
795 { MSR1(10), "Interrupt Group 10" },
796 { MSR1(11), "Interrupt Group 11" },
797 { MSR1(12), "Interrupt Group 12" },
798 { MSR1(13), "Interrupt Group 13" },
799 { MSR1(14), "Interrupt Group 14" },
800 { MSR1(15), "Interrupt Group 15" },
801 { BITVAL_EOT }
802 }},
803 { 7, 4, "MAP_Z9", "Map Unrestricted Z Input 9", PRESENT_BIN, {
804 { MSR1(0), "Disable" },
805 { MSR1(1), "Interrupt Group 1" },
806 { MSR1(2), "Interrupt Group 2" },
807 { MSR1(3), "Interrupt Group 3" },
808 { MSR1(4), "Interrupt Group 4" },
809 { MSR1(5), "Interrupt Group 5" },
810 { MSR1(6), "Interrupt Group 6" },
811 { MSR1(7), "Interrupt Group 7" },
812 { MSR1(8), "Interrupt Group 8" },
813 { MSR1(9), "Interrupt Group 9" },
814 { MSR1(10), "Interrupt Group 10" },
815 { MSR1(11), "Interrupt Group 11" },
816 { MSR1(12), "Interrupt Group 12" },
817 { MSR1(13), "Interrupt Group 13" },
818 { MSR1(14), "Interrupt Group 14" },
819 { MSR1(15), "Interrupt Group 15" },
820 { BITVAL_EOT }
821 }},
822 { 3, 4, "MAP_Z8", "Map Unrestricted Z Input 8", PRESENT_BIN, {
823 { MSR1(0), "Disable" },
824 { MSR1(1), "Interrupt Group 1" },
825 { MSR1(2), "Interrupt Group 2" },
826 { MSR1(3), "Interrupt Group 3" },
827 { MSR1(4), "Interrupt Group 4" },
828 { MSR1(5), "Interrupt Group 5" },
829 { MSR1(6), "Interrupt Group 6" },
830 { MSR1(7), "Interrupt Group 7" },
831 { MSR1(8), "Interrupt Group 8" },
832 { MSR1(9), "Interrupt Group 9" },
833 { MSR1(10), "Interrupt Group 10" },
834 { MSR1(11), "Interrupt Group 11" },
835 { MSR1(12), "Interrupt Group 12" },
836 { MSR1(13), "Interrupt Group 13" },
837 { MSR1(14), "Interrupt Group 14" },
838 { MSR1(15), "Interrupt Group 15" },
839 { BITVAL_EOT }
840 }},
841 { BITS_EOT }
842 }},
843 { 0x51400024, MSRTYPE_RDWR, MSR2(0, 0xffff), "PIC_IRQM_PRIM", "IRQ Mapper Primary Mask", {
844 { 63, 48, RESERVED },
845 { 15, 1, "PRIM15_MSK", "Primary Input 15 Mask", PRESENT_DEC, {
846 { MSR1(0), "Mask the interrupt source" },
847 { MSR1(1), "Do not mask the interrupt source" },
848 { BITVAL_EOT }
849 }},
850 { 14, 1, "PRIM14_MSK", "Primary Input 14 Mask", PRESENT_DEC, {
851 { MSR1(0), "Mask the interrupt source" },
852 { MSR1(1), "Do not mask the interrupt source" },
853 { BITVAL_EOT }
854 }},
855 { 13, 1, "PRIM13_MSK", "Primary Input 13 Mask", PRESENT_DEC, {
856 { MSR1(0), "Mask the interrupt source" },
857 { MSR1(1), "Do not mask the interrupt source" },
858 { BITVAL_EOT }
859 }},
860 { 12, 1, "PRIM12_MSK", "Primary Input 12 Mask", PRESENT_DEC, {
861 { MSR1(0), "Mask the interrupt source" },
862 { MSR1(1), "Do not mask the interrupt source" },
863 { BITVAL_EOT }
864 }},
865 { 11, 1, "PRIM11_MSK", "Primary Input 11 Mask", PRESENT_DEC, {
866 { MSR1(0), "Mask the interrupt source" },
867 { MSR1(1), "Do not mask the interrupt source" },
868 { BITVAL_EOT }
869 }},
870 { 10, 1, "PRIM10_MSK", "Primary Input 10 Mask", PRESENT_DEC, {
871 { MSR1(0), "Mask the interrupt source" },
872 { MSR1(1), "Do not mask the interrupt source" },
873 { BITVAL_EOT }
874 }},
875 { 9, 1, "PRIM9_MSK", "Primary Input 9 Mask", PRESENT_DEC, {
876 { MSR1(0), "Mask the interrupt source" },
877 { MSR1(1), "Do not mask the interrupt source" },
878 { BITVAL_EOT }
879 }},
880 { 8, 1, "PRIM8_MSK", "Primary Input 8 Mask", PRESENT_DEC, {
881 { MSR1(0), "Mask the interrupt source" },
882 { MSR1(1), "Do not mask the interrupt source" },
883 { BITVAL_EOT }
884 }},
885 { 7, 1, "PRIM7_MSK", "Primary Input 7 Mask", PRESENT_DEC, {
886 { MSR1(0), "Mask the interrupt source" },
887 { MSR1(1), "Do not mask the interrupt source" },
888 { BITVAL_EOT }
889 }},
890 { 6, 1, "PRIM6_MSK", "Primary Input 6 Mask", PRESENT_DEC, {
891 { MSR1(0), "Mask the interrupt source" },
892 { MSR1(1), "Do not mask the interrupt source" },
893 { BITVAL_EOT }
894 }},
895 { 5, 1, "PRIM5_MSK", "Primary Input 5 Mask", PRESENT_DEC, {
896 { MSR1(0), "Mask the interrupt source" },
897 { MSR1(1), "Do not mask the interrupt source" },
898 { BITVAL_EOT }
899 }},
900 { 4, 1, "PRIM4_MSK", "Primary Input 4 Mask", PRESENT_DEC, {
901 { MSR1(0), "Mask the interrupt source" },
902 { MSR1(1), "Do not mask the interrupt source" },
903 { BITVAL_EOT }
904 }},
905 { 3, 1, "PRIM3_MSK", "Primary Input 3 Mask", PRESENT_DEC, {
906 { MSR1(0), "Mask the interrupt source" },
907 { MSR1(1), "Do not mask the interrupt source" },
908 { BITVAL_EOT }
909 }},
910 { 2, 1, RESERVED },
911 { 1, 1, "PRIM1_MSK", "Primary Input 1 Mask", PRESENT_DEC, {
912 { MSR1(0), "Mask the interrupt source" },
913 { MSR1(1), "Do not mask the interrupt source" },
914 { BITVAL_EOT }
915 }},
916 { 0, 1, "PRIM0_MSK", "Primary Input 0 Mask", PRESENT_DEC, {
917 { MSR1(0), "Mask the interrupt source" },
918 { MSR1(1), "Do not mask the interrupt source" },
919 { BITVAL_EOT }
920 }},
921 { BITS_EOT }
922 }},
923 { 0x51400025, MSRTYPE_RDWR, MSR2(0, 0), "PIC_IRQM_LPC", "IRQ Mapper LPC Mask", {
924 { 63, 48, RESERVED },
925 { 15, 1, "LPC15_EN", "LPC Input 15 Enable", PRESENT_DEC, {
926 { MSR1(0), "Disable interrupt source" },
927 { MSR1(1), "Enable interrupt source" },
928 { BITVAL_EOT }
929 }},
930 { 14, 1, "LPC14_EN", "LPC Input 14 Enable", PRESENT_DEC, {
931 { MSR1(0), "Disable interrupt source" },
932 { MSR1(1), "Enable interrupt source" },
933 { BITVAL_EOT }
934 }},
935 { 13, 1, "LPC13_EN", "LPC Input 13 Enable", PRESENT_DEC, {
936 { MSR1(0), "Disable interrupt source" },
937 { MSR1(1), "Enable interrupt source" },
938 { BITVAL_EOT }
939 }},
940 { 12, 1, "LPC12_EN", "LPC Input 12 Enable", PRESENT_DEC, {
941 { MSR1(0), "Disable interrupt source" },
942 { MSR1(1), "Enable interrupt source" },
943 { BITVAL_EOT }
944 }},
945 { 11, 1, "LPC11_EN", "LPC Input 11 Enable", PRESENT_DEC, {
946 { MSR1(0), "Disable interrupt source" },
947 { MSR1(1), "Enable interrupt source" },
948 { BITVAL_EOT }
949 }},
950 { 10, 1, "LPC10_EN", "LPC Input 10 Enable", PRESENT_DEC, {
951 { MSR1(0), "Disable interrupt source" },
952 { MSR1(1), "Enable interrupt source" },
953 { BITVAL_EOT }
954 }},
955 { 9, 1, "LPC9_EN", "LPC Input 9 Enable", PRESENT_DEC, {
956 { MSR1(0), "Disable interrupt source" },
957 { MSR1(1), "Enable interrupt source" },
958 { BITVAL_EOT }
959 }},
960 { 8, 1, "LPC8_EN", "LPC Input 8 Enable", PRESENT_DEC, {
961 { MSR1(0), "Disable interrupt source" },
962 { MSR1(1), "Enable interrupt source" },
963 { BITVAL_EOT }
964 }},
965 { 7, 1, "LPC7_EN", "LPC Input 7 Enable", PRESENT_DEC, {
966 { MSR1(0), "Disable interrupt source" },
967 { MSR1(1), "Enable interrupt source" },
968 { BITVAL_EOT }
969 }},
970 { 6, 1, "LPC6_EN", "LPC Input 6 Enable", PRESENT_DEC, {
971 { MSR1(0), "Disable interrupt source" },
972 { MSR1(1), "Enable interrupt source" },
973 { BITVAL_EOT }
974 }},
975 { 5, 1, "LPC5_EN", "LPC Input 5 Enable", PRESENT_DEC, {
976 { MSR1(0), "Disable interrupt source" },
977 { MSR1(1), "Enable interrupt source" },
978 { BITVAL_EOT }
979 }},
980 { 4, 1, "LPC4_EN", "LPC Input 4 Enable", PRESENT_DEC, {
981 { MSR1(0), "Disable interrupt source" },
982 { MSR1(1), "Enable interrupt source" },
983 { BITVAL_EOT }
984 }},
985 { 3, 1, "LPC3_EN", "LPC Input 3 Enable", PRESENT_DEC, {
986 { MSR1(0), "Disable interrupt source" },
987 { MSR1(1), "Enable interrupt source" },
988 { BITVAL_EOT }
989 }},
990 { 2, 1, RESERVED },
991 { 1, 1, "LPC1_EN", "LPC Input 1 Enable", PRESENT_DEC, {
992 { MSR1(0), "Disable interrupt source" },
993 { MSR1(1), "Enable interrupt source" },
994 { BITVAL_EOT }
995 }},
996 { 0, 1, "LPC0_EN", "LPC Input 0 Enable", PRESENT_DEC, {
997 { MSR1(0), "Disable interrupt source" },
998 { MSR1(1), "Enable interrupt source" },
999 { BITVAL_EOT }
1000 }},
1001 { BITS_EOT }
1002 }},
1003 { 0x51400026, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_LOW", "IRQ Mapper Extended Interrupt Request Status Low", {
1004 { 63, 32, RESERVED },
1005 { 31, 1, "IG7_STS_Z", "Unrestricted Source Z Input 7", PRESENT_BIN, {
1006 { MSR1(0), "No interrupt" },
1007 { MSR1(1), "INTERRUPT" },
1008 { BITVAL_EOT }
1009 }},
1010 { 30, 1, "IG7_STS_Y", "Unrestricted Source Y Input 7", PRESENT_BIN, {
1011 { MSR1(0), "No interrupt" },
1012 { MSR1(1), "INTERRUPT" },
1013 { BITVAL_EOT }
1014 }},
1015 { 29, 1, "IG7_STS_LPC", "LPC Input 7", PRESENT_BIN, {
1016 { MSR1(0), "No interrupt" },
1017 { MSR1(1), "INTERRUPT" },
1018 { BITVAL_EOT }
1019 }},
1020 { 28, 1, "IG7_STS_PRIM", "Primary Input 7", PRESENT_BIN, {
1021 { MSR1(0), "No interrupt" },
1022 { MSR1(1), "INTERRUPT" },
1023 { BITVAL_EOT }
1024 }},
1025 { 27, 1, "IG6_STS_Z", "Unrestricted Source Z Input 6", PRESENT_BIN, {
1026 { MSR1(0), "No interrupt" },
1027 { MSR1(1), "INTERRUPT" },
1028 { BITVAL_EOT }
1029 }},
1030 { 26, 1, "IG6_STS_Y", "Unrestricted Source Y Input 6", PRESENT_BIN, {
1031 { MSR1(0), "No interrupt" },
1032 { MSR1(1), "INTERRUPT" },
1033 { BITVAL_EOT }
1034 }},
1035 { 25, 1, "IG6_STS_LPC", "LPC Input 6", PRESENT_BIN, {
1036 { MSR1(0), "No interrupt" },
1037 { MSR1(1), "INTERRUPT" },
1038 { BITVAL_EOT }
1039 }},
1040 { 24, 1, "IG6_STS_PRIM", "Primary Input 6", PRESENT_BIN, {
1041 { MSR1(0), "No interrupt" },
1042 { MSR1(1), "INTERRUPT" },
1043 { BITVAL_EOT }
1044 }},
1045 { 23, 1, "IG5_STS_Z", "Unrestricted Source Z Input 5", PRESENT_BIN, {
1046 { MSR1(0), "No interrupt" },
1047 { MSR1(1), "INTERRUPT" },
1048 { BITVAL_EOT }
1049 }},
1050 { 22, 1, "IG5_STS_Y", "Unrestricted Source Y Input 5", PRESENT_BIN, {
1051 { MSR1(0), "No interrupt" },
1052 { MSR1(1), "INTERRUPT" },
1053 { BITVAL_EOT }
1054 }},
1055 { 21, 1, "IG5_STS_LPC", "LPC Input 5", PRESENT_BIN, {
1056 { MSR1(0), "No interrupt" },
1057 { MSR1(1), "INTERRUPT" },
1058 { BITVAL_EOT }
1059 }},
1060 { 20, 1, "IG5_STS_PRIM", "Primary Input 5", PRESENT_BIN, {
1061 { MSR1(0), "No interrupt" },
1062 { MSR1(1), "INTERRUPT" },
1063 { BITVAL_EOT }
1064 }},
1065 { 19, 1, "IG4_STS_Z", "Unrestricted Source Z Input 4", PRESENT_BIN, {
1066 { MSR1(0), "No interrupt" },
1067 { MSR1(1), "INTERRUPT" },
1068 { BITVAL_EOT }
1069 }},
1070 { 18, 1, "IG4_STS_Y", "Unrestricted Source Y Input 4", PRESENT_BIN, {
1071 { MSR1(0), "No interrupt" },
1072 { MSR1(1), "INTERRUPT" },
1073 { BITVAL_EOT }
1074 }},
1075 { 17, 1, "IG4_STS_LPC", "LPC Input 4", PRESENT_BIN, {
1076 { MSR1(0), "No interrupt" },
1077 { MSR1(1), "INTERRUPT" },
1078 { BITVAL_EOT }
1079 }},
1080 { 16, 1, "IG4_STS_PRIM", "Primary Input 4", PRESENT_BIN, {
1081 { MSR1(0), "No interrupt" },
1082 { MSR1(1), "INTERRUPT" },
1083 { BITVAL_EOT }
1084 }},
1085 { 15, 1, "IG3_STS_Z", "Unrestricted Source Z Input 3", PRESENT_BIN, {
1086 { MSR1(0), "No interrupt" },
1087 { MSR1(1), "INTERRUPT" },
1088 { BITVAL_EOT }
1089 }},
1090 { 14, 1, "IG3_STS_Y", "Unrestricted Source Y Input 3", PRESENT_BIN, {
1091 { MSR1(0), "No interrupt" },
1092 { MSR1(1), "INTERRUPT" },
1093 { BITVAL_EOT }
1094 }},
1095 { 13, 1, "IG3_STS_LPC", "LPC Input 3", PRESENT_BIN, {
1096 { MSR1(0), "No interrupt" },
1097 { MSR1(1), "INTERRUPT" },
1098 { BITVAL_EOT }
1099 }},
1100 { 12, 1, "IG3_STS_PRIM", "Primary Input 3", PRESENT_BIN, {
1101 { MSR1(0), "No interrupt" },
1102 { MSR1(1), "INTERRUPT" },
1103 { BITVAL_EOT }
1104 }},
1105 { 11, 1, "IG2_STS_Z", "Unrestricted Source Z Input 2", PRESENT_BIN, {
1106 { MSR1(0), "No interrupt" },
1107 { MSR1(1), "INTERRUPT" },
1108 { BITVAL_EOT }
1109 }},
1110 { 10, 1, "IG2_STS_Y", "Unrestricted Source Y Input 2", PRESENT_BIN, {
1111 { MSR1(0), "No interrupt" },
1112 { MSR1(1), "INTERRUPT" },
1113 { BITVAL_EOT }
1114 }},
1115 { 9, 2, RESERVED },
1116 { 7, 1, "IG1_STS_Z", "Unrestricted Source Z Input 1", PRESENT_BIN, {
1117 { MSR1(0), "No interrupt" },
1118 { MSR1(1), "INTERRUPT" },
1119 { BITVAL_EOT }
1120 }},
1121 { 6, 1, "IG1_STS_Y", "Unrestricted Source Y Input 1", PRESENT_BIN, {
1122 { MSR1(0), "No interrupt" },
1123 { MSR1(1), "INTERRUPT" },
1124 { BITVAL_EOT }
1125 }},
1126 { 5, 1, "IG1_STS_LPC", "LPC Input 1", PRESENT_BIN, {
1127 { MSR1(0), "No interrupt" },
1128 { MSR1(1), "INTERRUPT" },
1129 { BITVAL_EOT }
1130 }},
1131 { 4, 1, "IG1_STS_PRIM", "Primary Input 1", PRESENT_BIN, {
1132 { MSR1(0), "No interrupt" },
1133 { MSR1(1), "INTERRUPT" },
1134 { BITVAL_EOT }
1135 }},
1136 { 3, 2, RESERVED },
1137 { 1, 1, "IG0_STS_LPC", "LPC Input 0", PRESENT_BIN, {
1138 { MSR1(0), "No interrupt" },
1139 { MSR1(1), "INTERRUPT" },
1140 { BITVAL_EOT }
1141 }},
1142 { 0, 1, "IG0_STS_PRIM", "Primary Input 0", PRESENT_BIN, {
1143 { MSR1(0), "No interrupt" },
1144 { MSR1(1), "INTERRUPT" },
1145 { BITVAL_EOT }
1146 }},
1147 { BITS_EOT }
1148 }},
1149 { 0x51400027, MSRTYPE_RDONLY, MSR2(0, 0), "PIC_XIRR_STS_HIGH", "IRQ Mapper Extended Interrupt Request Status High", {
1150 { 63, 32, RESERVED },
1151 { 31, 1, "IG15_STS_Z", "Unrestricted Source Z Input 15", PRESENT_BIN, {
1152 { MSR1(0), "No interrupt" },
1153 { MSR1(1), "INTERRUPT" },
1154 { BITVAL_EOT }
1155 }},
1156 { 30, 1, "IG15_STS_Y", "Unrestricted Source Y Input 15", PRESENT_BIN, {
1157 { MSR1(0), "No interrupt" },
1158 { MSR1(1), "INTERRUPT" },
1159 { BITVAL_EOT }
1160 }},
1161 { 29, 1, "IG15_STS_LPC", "LPC Input 15", PRESENT_BIN, {
1162 { MSR1(0), "No interrupt" },
1163 { MSR1(1), "INTERRUPT" },
1164 { BITVAL_EOT }
1165 }},
1166 { 28, 1, "IG15_STS_PRIM", "Primary Input 15", PRESENT_BIN, {
1167 { MSR1(0), "No interrupt" },
1168 { MSR1(1), "INTERRUPT" },
1169 { BITVAL_EOT }
1170 }},
1171 { 27, 1, "IG14_STS_Z", "Unrestricted Source Z Input 14", PRESENT_BIN, {
1172 { MSR1(0), "No interrupt" },
1173 { MSR1(1), "INTERRUPT" },
1174 { BITVAL_EOT }
1175 }},
1176 { 26, 1, "IG14_STS_Y", "Unrestricted Source Y Input 14", PRESENT_BIN, {
1177 { MSR1(0), "No interrupt" },
1178 { MSR1(1), "INTERRUPT" },
1179 { BITVAL_EOT }
1180 }},
1181 { 25, 1, "IG14_STS_LPC", "LPC Input 14", PRESENT_BIN, {
1182 { MSR1(0), "No interrupt" },
1183 { MSR1(1), "INTERRUPT" },
1184 { BITVAL_EOT }
1185 }},
1186 { 24, 1, "IG14_STS_PRIM", "Primary Input 14", PRESENT_BIN, {
1187 { MSR1(0), "No interrupt" },
1188 { MSR1(1), "INTERRUPT" },
1189 { BITVAL_EOT }
1190 }},
1191 { 23, 1, "IG13_STS_Z", "Unrestricted Source Z Input 13", PRESENT_BIN, {
1192 { MSR1(0), "No interrupt" },
1193 { MSR1(1), "INTERRUPT" },
1194 { BITVAL_EOT }
1195 }},
1196 { 22, 1, "IG13_STS_Y", "Unrestricted Source Y Input 13", PRESENT_BIN, {
1197 { MSR1(0), "No interrupt" },
1198 { MSR1(1), "INTERRUPT" },
1199 { BITVAL_EOT }
1200 }},
1201 { 21, 1, "IG13_STS_LPC", "LPC Input 13", PRESENT_BIN, {
1202 { MSR1(0), "No interrupt" },
1203 { MSR1(1), "INTERRUPT" },
1204 { BITVAL_EOT }
1205 }},
1206 { 20, 1, "IG13_STS_PRIM", "Primary Input 13", PRESENT_BIN, {
1207 { MSR1(0), "No interrupt" },
1208 { MSR1(1), "INTERRUPT" },
1209 { BITVAL_EOT }
1210 }},
1211 { 19, 1, "IG12_STS_Z", "Unrestricted Source Z Input 12", PRESENT_BIN, {
1212 { MSR1(0), "No interrupt" },
1213 { MSR1(1), "INTERRUPT" },
1214 { BITVAL_EOT }
1215 }},
1216 { 18, 1, "IG12_STS_Y", "Unrestricted Source Y Input 12", PRESENT_BIN, {
1217 { MSR1(0), "No interrupt" },
1218 { MSR1(1), "INTERRUPT" },
1219 { BITVAL_EOT }
1220 }},
1221 { 17, 1, "IG12_STS_LPC", "LPC Input 12", PRESENT_BIN, {
1222 { MSR1(0), "No interrupt" },
1223 { MSR1(1), "INTERRUPT" },
1224 { BITVAL_EOT }
1225 }},
1226 { 16, 1, "IG12_STS_PRIM", "Primary Input 12", PRESENT_BIN, {
1227 { MSR1(0), "No interrupt" },
1228 { MSR1(1), "INTERRUPT" },
1229 { BITVAL_EOT }
1230 }},
1231 { 15, 1, "IG11_STS_Z", "Unrestricted Source Z Input 11", PRESENT_BIN, {
1232 { MSR1(0), "No interrupt" },
1233 { MSR1(1), "INTERRUPT" },
1234 { BITVAL_EOT }
1235 }},
1236 { 14, 1, "IG11_STS_Y", "Unrestricted Source Y Input 11", PRESENT_BIN, {
1237 { MSR1(0), "No interrupt" },
1238 { MSR1(1), "INTERRUPT" },
1239 { BITVAL_EOT }
1240 }},
1241 { 13, 1, "IG11_STS_LPC", "LPC Input 11", PRESENT_BIN, {
1242 { MSR1(0), "No interrupt" },
1243 { MSR1(1), "INTERRUPT" },
1244 { BITVAL_EOT }
1245 }},
1246 { 12, 1, "IG11_STS_PRIM", "Primary Input 11", PRESENT_BIN, {
1247 { MSR1(0), "No interrupt" },
1248 { MSR1(1), "INTERRUPT" },
1249 { BITVAL_EOT }
1250 }},
1251 { 11, 1, "IG10_STS_Z", "Unrestricted Source Z Input 10", PRESENT_BIN, {
1252 { MSR1(0), "No interrupt" },
1253 { MSR1(1), "INTERRUPT" },
1254 { BITVAL_EOT }
1255 }},
1256 { 10, 1, "IG10_STS_Y", "Unrestricted Source Y Input 10", PRESENT_BIN, {
1257 { MSR1(0), "No interrupt" },
1258 { MSR1(1), "INTERRUPT" },
1259 { BITVAL_EOT }
1260 }},
1261 { 9, 1, "IG10_STS_LPC", "LPC Input 10", PRESENT_BIN, {
1262 { MSR1(0), "No interrupt" },
1263 { MSR1(1), "INTERRUPT" },
1264 { BITVAL_EOT }
1265 }},
1266 { 8, 1, "IG10_STS_PRIM", "Primary Input 10", PRESENT_BIN, {
1267 { MSR1(0), "No interrupt" },
1268 { MSR1(1), "INTERRUPT" },
1269 { BITVAL_EOT }
1270 }},
1271 { 7, 1, "IG9_STS_Z", "Unrestricted Source Z Input 9", PRESENT_BIN, {
1272 { MSR1(0), "No interrupt" },
1273 { MSR1(1), "INTERRUPT" },
1274 { BITVAL_EOT }
1275 }},
1276 { 6, 1, "IG9_STS_Y", "Unrestricted Source Y Input 9", PRESENT_BIN, {
1277 { MSR1(0), "No interrupt" },
1278 { MSR1(1), "INTERRUPT" },
1279 { BITVAL_EOT }
1280 }},
1281 { 5, 1, "IG9_STS_LPC", "LPC Input 9", PRESENT_BIN, {
1282 { MSR1(0), "No interrupt" },
1283 { MSR1(1), "INTERRUPT" },
1284 { BITVAL_EOT }
1285 }},
1286 { 4, 1, "IG9_STS_PRIM", "Primary Input 9", PRESENT_BIN, {
1287 { MSR1(0), "No interrupt" },
1288 { MSR1(1), "INTERRUPT" },
1289 { BITVAL_EOT }
1290 }},
1291 { 3, 1, "IG8_STS_Z", "Unrestricted Source Z Input 8", PRESENT_BIN, {
1292 { MSR1(0), "No interrupt" },
1293 { MSR1(1), "INTERRUPT" },
1294 { BITVAL_EOT }
1295 }},
1296 { 2, 1, "IG8_STS_Y", "Unrestricted Source Y Input 8", PRESENT_BIN, {
1297 { MSR1(0), "No interrupt" },
1298 { MSR1(1), "INTERRUPT" },
1299 { BITVAL_EOT }
1300 }},
1301 { 1, 1, "IG8_STS_LPC", "LPC Input 8", PRESENT_BIN, {
1302 { MSR1(0), "No interrupt" },
1303 { MSR1(1), "INTERRUPT" },
1304 { BITVAL_EOT }
1305 }},
1306 { 0, 1, "IG8_STS_PRIM", "Primary Input 8", PRESENT_BIN, {
1307 { MSR1(0), "No interrupt" },
1308 { MSR1(1), "INTERRUPT" },
1309 { BITVAL_EOT }
1310 }},
1311 { BITS_EOT }
1312 }},
Christian Gmeiner42b808e2012-07-11 09:31:12 +0200[diff] [blame]1313 { 0x5140004e, MSRTYPE_RDWR, MSR2(0, 0), "LPC_SERIRQ", "LPC Serial IRQ Control", {
1314 { 31, 16, "INVERT", "IRQ[x] input is active low", PRESENT_HEX },
1315 { 15, 8, RESERVED },
1316 { 7, 1, "SIRQ_EN", "Serial IRQ Enable", PRESENT_BIN, {
1317 { MSR1(0), "Disable" },
1318 { MSR1(1), "Enable" },
1319 { BITVAL_EOT }
1320 }},
1321 { 6, 1, "SIRQ_MODE", "Serial IRQ Interface Mode", PRESENT_BIN, {
1322 { MSR1(0), "Continuous (Idle)" },
1323 { MSR1(1), "Quiet (Active)" },
1324 { BITVAL_EOT }
1325 }},
1326 { 5, 4, "IRQ_FRAME", "IRQ Data Frames", PRESENT_BIN, {
1327 { MSR1(0), "17" },
1328 { MSR1(1), "18" },
1329 { MSR1(2), "19" },
1330 { MSR1(3), "20" },
1331 { MSR1(4), "21" },
1332 { MSR1(5), "22" },
1333 { MSR1(6), "23" },
1334 { MSR1(7), "24" },
1335 { MSR1(8), "25" },
1336 { MSR1(9), "26" },
1337 { MSR1(10), "27" },
1338 { MSR1(11), "28" },
1339 { MSR1(12), "29" },
1340 { MSR1(13), "30" },
1341 { MSR1(14), "31" },
1342 { MSR1(15), "32" },
1343 { BITVAL_EOT }
1344 }},
1345 { 1, 2, "START_FPW", "Start Frame Pulse Width", PRESENT_BIN, {
1346 { MSR1(0), "4 clocks" },
1347 { MSR1(1), "6 clocks" },
1348 { MSR1(2), "8 clocks" },
1349 { MSR1(3), "Reserved" },
1350 { BITVAL_EOT }
1351 }},
1352 { BITS_EOT }
1353 }},
Peter Stugedad1e302008-11-22 17:13:36 +0000[diff] [blame]1354 { MSR_EOT }
1355};