Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 1 | config BOARD_GOOGLE_BROX_COMMON |
| 2 | def_bool n |
| 3 | select DRIVERS_GENERIC_GPIO_KEYS |
| 4 | select DRIVERS_I2C_GENERIC |
| 5 | select DRIVERS_I2C_HID |
| 6 | select DRIVERS_INTEL_DPTF |
| 7 | select DRIVERS_INTEL_DPTF_SUPPORTS_TPCH |
| 8 | select DRIVERS_INTEL_PMC |
| 9 | select DRIVERS_INTEL_SOUNDWIRE |
| 10 | select DRIVERS_INTEL_USB4_RETIMER |
| 11 | select DRIVERS_SPI_ACPI |
| 12 | select DRIVERS_WIFI_GENERIC |
| 13 | select EC_GOOGLE_CHROMEEC |
| 14 | select EC_GOOGLE_CHROMEEC_BOARDID |
| 15 | select EC_GOOGLE_CHROMEEC_ESPI |
| 16 | select EC_GOOGLE_CHROMEEC_SKUID |
| 17 | select ENABLE_TCSS_USB_DETECTION if !CHROMEOS |
| 18 | select FW_CONFIG |
| 19 | select FW_CONFIG_SOURCE_CHROMEEC_CBI |
| 20 | select GOOGLE_SMBIOS_MAINBOARD_VERSION |
| 21 | select HAVE_ACPI_RESUME |
| 22 | select HAVE_ACPI_TABLES |
| 23 | select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP |
| 24 | select I2C_TPM |
| 25 | select INTEL_LPSS_UART_FOR_CONSOLE |
| 26 | select MAINBOARD_HAS_CHROMEOS |
| 27 | select MAINBOARD_HAS_TPM2 |
| 28 | select PMC_IPC_ACPI_INTERFACE |
| 29 | select SOC_INTEL_CSE_LITE_SKU |
| 30 | # select SOC_INTEL_CSE_SEND_EOP_ASYNC |
| 31 | select SOC_INTEL_COMMON_BLOCK_USB4 |
| 32 | select SOC_INTEL_COMMON_BLOCK_TCSS |
| 33 | select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES |
| 34 | select SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE |
| 35 | select SOC_INTEL_CRASHLOG |
| 36 | select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V1 |
| 37 | |
| 38 | config BOARD_GOOGLE_BASEBOARD_BROX |
| 39 | def_bool n |
| 40 | select BOARD_GOOGLE_BROX_COMMON |
| 41 | select BOARD_ROMSIZE_KB_32768 |
| 42 | select DRIVERS_AUDIO_SOF |
| 43 | select DRIVERS_GFX_GENERIC |
| 44 | select HAVE_SLP_S0_GATE |
| 45 | select MEMORY_SOLDERDOWN |
| 46 | select SOC_INTEL_COMMON_BLOCK_IPU |
| 47 | select SOC_INTEL_CRASHLOG |
| 48 | select SOC_INTEL_RAPTORLAKE |
Shelley Chen | 4927271 | 2023-10-25 18:49:13 -0700 | [diff] [blame] | 49 | select SOC_INTEL_ALDERLAKE_PCH_P |
Ivy Jian | 1397fd3 | 2023-11-28 15:17:40 +0800 | [diff] [blame] | 50 | select DRIVERS_INTEL_ISH |
Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 51 | select SYSTEM_TYPE_LAPTOP |
Shelley Chen | 7e775cf | 2023-11-14 12:58:55 -0800 | [diff] [blame] | 52 | select TPM_GOOGLE_TI50 |
Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 53 | |
| 54 | config BOARD_GOOGLE_BROX |
Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 55 | select BOARD_GOOGLE_BASEBOARD_BROX |
| 56 | |
| 57 | if BOARD_GOOGLE_BROX_COMMON |
| 58 | |
| 59 | config BASEBOARD_DIR |
| 60 | string |
| 61 | default "brox" if BOARD_GOOGLE_BASEBOARD_BROX |
| 62 | |
| 63 | config CHROMEOS |
| 64 | select EC_GOOGLE_CHROMEEC_SWITCHES |
Shelley Chen | b6053bc | 2023-12-14 19:48:18 -0800 | [diff] [blame^] | 65 | select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC |
| 66 | select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC |
Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 67 | select HAS_RECOVERY_MRC_CACHE |
| 68 | |
| 69 | config CHROMEOS_WIFI_SAR |
| 70 | bool "Enable SAR options for ChromeOS build" |
| 71 | depends on CHROMEOS |
| 72 | select DSAR_ENABLE |
| 73 | select GEO_SAR_ENABLE |
| 74 | select SAR_ENABLE |
| 75 | select USE_SAR |
| 76 | |
| 77 | config DEVICETREE |
| 78 | default "variants/baseboard/\$(CONFIG_BASEBOARD_DIR)/devicetree.cb" |
| 79 | |
| 80 | config DRIVER_TPM_I2C_BUS |
| 81 | hex |
Shelley Chen | ea9248e | 2023-11-13 10:02:28 -0800 | [diff] [blame] | 82 | default 0x4 if BOARD_GOOGLE_BROX |
Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 83 | |
| 84 | config DRIVER_TPM_I2C_ADDR |
| 85 | hex |
| 86 | default 0x50 |
| 87 | |
| 88 | config FMDFILE |
| 89 | default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS |
| 90 | |
| 91 | config TPM_TIS_ACPI_INTERRUPT |
| 92 | int |
Shelley Chen | ea9248e | 2023-11-13 10:02:28 -0800 | [diff] [blame] | 93 | default 66 # GPE0_DW2_02 (GPP_E2) |
Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 94 | |
| 95 | config OVERRIDE_DEVICETREE |
| 96 | default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" |
| 97 | |
| 98 | config MAINBOARD_DIR |
| 99 | default "google/brox" |
| 100 | |
| 101 | config MAINBOARD_FAMILY |
| 102 | string |
| 103 | default "Google_Brox" if BOARD_GOOGLE_BASEBOARD_BROX |
| 104 | |
| 105 | config MAINBOARD_PART_NUMBER |
| 106 | default "Brox" if BOARD_GOOGLE_BROX |
| 107 | |
| 108 | config VARIANT_DIR |
| 109 | default "brox" if BOARD_GOOGLE_BROX |
| 110 | |
| 111 | config VBOOT |
| 112 | select VBOOT_EARLY_EC_SYNC |
| 113 | select VBOOT_LID_SWITCH |
| 114 | |
| 115 | config DIMM_SPD_SIZE |
| 116 | default 512 |
| 117 | |
| 118 | config UART_FOR_CONSOLE |
| 119 | int |
| 120 | default 0 |
| 121 | |
| 122 | config HAVE_WWAN_POWER_SEQUENCE |
| 123 | def_bool n |
| 124 | help |
| 125 | Select this if the variant has a WWAN module and requires the poweroff sequence |
| 126 | to be performed on shutdown. Must define WWAN_FCPO, WWAN_RST and WWAN_PERST GPIOs |
| 127 | in variant.h, as well as T1_OFF_MS (time between PERST & RST) and T2_OFF_MS (time |
| 128 | between RST and FCPO). WWAN_PERST and T1_OFF_MS are only necessary for PCIe WWAN |
| 129 | (when HAVE_PCIE_WWAN is also selected). |
| 130 | |
| 131 | config HAVE_PCIE_WWAN |
| 132 | def_bool n |
| 133 | |
| 134 | config USE_PM_ACPI_TIMER |
| 135 | default y if BOARD_GOOGLE_PRIMUS4ES |
| 136 | default n |
| 137 | |
| 138 | config MEMORY_SODIMM |
| 139 | def_bool n |
| 140 | select SPD_CACHE_ENABLE |
| 141 | select SPD_CACHE_IN_FMAP |
| 142 | |
| 143 | config MEMORY_SOLDERDOWN |
| 144 | def_bool n |
| 145 | select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS |
| 146 | select HAVE_SPD_IN_CBFS |
| 147 | |
| 148 | config HAVE_SLP_S0_GATE |
| 149 | def_bool n |
| 150 | |
| 151 | config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS |
| 152 | int |
| 153 | default 33 |
| 154 | |
Shelley Chen | 9b230ae | 2023-09-15 16:01:31 -0700 | [diff] [blame] | 155 | endif # BOARD_GOOGLE_BROX_COMMON |