Angel Pons | 08d9f95 | 2020-04-03 01:22:39 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 2 | |
| 3 | #include <device/pci_ops.h> |
| 4 | #include <northbridge/intel/sandybridge/raminit_native.h> |
| 5 | #include <southbridge/intel/common/pmbase.h> |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 6 | #include <southbridge/intel/bd82x6x/pch.h> |
| 7 | |
Arthur Heymans | 2b28a16 | 2019-11-12 17:21:08 +0100 | [diff] [blame] | 8 | void mainboard_pch_lpc_setup(void) |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 9 | { |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 10 | u16 reg16; |
| 11 | reg16 = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0xa4); |
| 12 | reg16 |= (1 << 13); // WOL Enable Override (WOL_EN_OVRD) |
| 13 | pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xa4, reg16); |
| 14 | } |
| 15 | |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 16 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 17 | {1, 0, 0}, |
| 18 | {1, 0, 0}, |
| 19 | {1, 0, 1}, |
| 20 | {1, 0, 1}, |
| 21 | {1, 0, 2}, |
| 22 | {1, 0, 2}, |
| 23 | {1, 0, 3}, |
| 24 | {1, 0, 3}, |
| 25 | {1, 0, 4}, |
| 26 | {1, 0, 4}, |
| 27 | {1, 0, 6}, |
| 28 | {1, 0, 5}, |
| 29 | {1, 0, 5}, |
| 30 | {1, 0, 6}, |
| 31 | }; |
| 32 | |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 33 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 34 | { |
| 35 | read_spd(&spd[0], 0x50, id_only); |
| 36 | read_spd(&spd[2], 0x52, id_only); |
| 37 | } |