Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
Angel Pons | bceea67 | 2021-05-17 10:58:36 +0200 | [diff] [blame] | 2 | device domain 0 on |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 3 | subsystemid 0x1462 0x7707 inherit |
Angel Pons | cd57d57 | 2020-01-01 21:50:59 +0100 | [diff] [blame] | 4 | |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame^] | 5 | device ref host_bridge on end # Host bridge |
| 6 | device ref peg10 on end # PCIe Bridge for discrete graphics |
| 7 | device ref igd off end # Internal graphics |
Angel Pons | cd57d57 | 2020-01-01 21:50:59 +0100 | [diff] [blame] | 8 | |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 9 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 10 | register "docking_supported" = "0" |
| 11 | register "gen1_dec" = "0x000c0291" |
| 12 | register "gen2_dec" = "0x000c0a01" |
Angel Pons | af4bd56 | 2021-12-28 13:05:56 +0100 | [diff] [blame] | 13 | register "pcie_port_coalesce" = "true" |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 14 | register "sata_interface_speed_support" = "0x3" |
| 15 | register "sata_port_map" = "0x33" |
| 16 | register "spi_lvscc" = "0x2005" |
| 17 | register "spi_uvscc" = "0x2005" |
| 18 | register "gpe0_en" = "0x28000040" |
Angel Pons | cd57d57 | 2020-01-01 21:50:59 +0100 | [diff] [blame] | 19 | |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame^] | 20 | device ref mei1 on end # Management Engine Interface 1 |
| 21 | device ref mei2 off end # Management Engine Interface 2 |
| 22 | device ref me_ide_r off end # Management Engine IDE-R |
| 23 | device ref me_kt off end # Management Engine KT |
| 24 | device ref gbe on end # Intel Gigabit Ethernet |
| 25 | device ref ehci2 on end # USB2 EHCI #2 |
| 26 | device ref hda on end # HD Audio controller |
| 27 | device ref pcie_rp1 on end # PCIe Port #1 |
| 28 | device ref pcie_rp2 off end # PCIe Port #2 |
| 29 | device ref pcie_rp3 off end # PCIe Port #3 |
| 30 | device ref pcie_rp4 off end # PCIe Port #4 |
| 31 | device ref pcie_rp5 off end # PCIe Port #5 |
| 32 | device ref pcie_rp6 off end # PCIe Port #6 |
| 33 | device ref pcie_rp7 on end # PCIe Port #7 |
| 34 | device ref pcie_rp8 off end # PCIe Port #8 |
| 35 | device ref ehci1 on end # USB2 EHCI #1 |
| 36 | device ref pci_bridge off end # PCI bridge |
| 37 | device ref lpc on # LPC bridge |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 38 | chip superio/fintek/f71808a |
| 39 | register "multi_function_register_0" = "0x00" # 0x28 |
| 40 | register "multi_function_register_1" = "0xc0" # 0x29 |
| 41 | register "multi_function_register_2" = "0x20" # 0x2a |
| 42 | register "multi_function_register_3" = "0x4f" # 0x2b |
| 43 | register "multi_function_register_4" = "0x90" # 0x2c |
| 44 | register "hwm_peci_tsi_ctrl" = "0x02" # 0x0a - PECI enabled, 1.23 V |
Angel Pons | cd57d57 | 2020-01-01 21:50:59 +0100 | [diff] [blame] | 45 | register "hwm_tcc_temp" = "0x64" # 0x0c - TCC temperature = 100 °C |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 46 | register "hwm_fan1_seg1_speed" = "0xff" # 0xaa - Fan 1 segment 1 |
| 47 | register "hwm_fan1_seg2_speed" = "0xe2" # 0xab - Fan 1 segment 2 |
| 48 | register "hwm_fan1_seg3_speed" = "0xaf" # 0xac - Fan 1 segment 3 |
| 49 | register "hwm_fan1_seg4_speed" = "0x89" # 0xad - Fan 1 segment 4 |
| 50 | register "hwm_fan1_seg5_speed" = "0x72" # 0xae - Fan 1 segment 5 |
| 51 | register "hwm_fan1_temp_src" = "0x10" # 0xaf - Fan 1 source = PECI |
| 52 | register "hwm_fan2_seg1_speed" = "0xff" # 0xba - Fan 2 segment 1 = 100% |
| 53 | register "hwm_fan2_seg2_speed" = "0xd9" # 0xbb - Fan 2 segment 2 = 86% |
| 54 | register "hwm_fan2_seg3_speed" = "0xb2" # 0xbc - Fan 2 segment 3 = 74% |
| 55 | register "hwm_fan2_seg4_speed" = "0x99" # 0xbd - Fan 2 segment 4 = 62% |
| 56 | register "hwm_fan2_seg5_speed" = "0x80" # 0xbe - Fan 2 segment 5 = 50% |
| 57 | register "hwm_fan2_temp_src" = "0x1e" # 0xbf - Fan 2 source = temperature 2 |
| 58 | |
| 59 | register "hwm_domain1_en" = "0x01" |
Angel Pons | cd57d57 | 2020-01-01 21:50:59 +0100 | [diff] [blame] | 60 | register "hwm_fan1_boundary_hysteresis" = "0x43" |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 61 | register "hwm_vt1_boundary_1_temperature" = "0x52" # 82°C |
| 62 | register "hwm_vt1_boundary_2_temperature" = "0x46" # 70°C |
| 63 | register "hwm_vt1_boundary_3_temperature" = "0x41" # 65°C |
| 64 | register "hwm_vt1_boundary_4_temperature" = "0x37" # 55°C |
| 65 | |
| 66 | device pnp 4e.1 off end # Serial Port |
| 67 | device pnp 4e.4 on # Hardware monitor |
| 68 | io 0x60 = 0x295 |
| 69 | irq 0x70 = 0 |
| 70 | # global |
| 71 | irq 0x27 = 0x10 # PWOK follows Intel sequence |
| 72 | irq 0x2d = 0x2e # Anykey+MouseButton wakeup |
| 73 | end |
| 74 | device pnp 4e.5 on # Keyboard |
| 75 | io 0x60 = 0x060 |
| 76 | irq 0x70 = 1 |
| 77 | irq 0x72 = 12 |
| 78 | end |
| 79 | device pnp 4e.6 on # GPIO |
| 80 | irq 0x70 = 0 |
| 81 | irq 0xd0 = 0x20 # GPIO2 Output Enable |
| 82 | irq 0xd1 = 0x20 # GPIO2 Output Data |
| 83 | irq 0xd3 = 0x20 # GPIO2 Drive Enable |
| 84 | end |
| 85 | device pnp 4e.7 off # WDT |
| 86 | io 0x60 = 0xa00 |
| 87 | end |
| 88 | device pnp 4e.8 off end # CIR |
| 89 | device pnp 4e.a on # PME, ACPI, Power Saving Registers |
| 90 | irq 0xe2 = 0x0c # EuP control |
| 91 | irq 0xed = 0xc0 # EuP Watchdog Control |
| 92 | irq 0xf4 = 0x10 # Keep Last State Select |
| 93 | irq 0xf9 = 0x09 # LED VSB Mode Select |
| 94 | end |
| 95 | end |
| 96 | end |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame^] | 97 | device ref sata1 on end # SATA Controller 1 |
| 98 | device ref smbus on end # SMBus |
| 99 | device ref sata2 off end # SATA Controller 2 |
| 100 | device ref thermal off end # Thermal |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 101 | end |
Max Blau | 517eda5 | 2019-04-29 23:48:31 +0200 | [diff] [blame] | 102 | end |
| 103 | end |